Hybrid Wired Wireless Network-on-Chip Latency Reduction
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Solution Overview
Problem
Network traffic congestion in on-chip communication networks of integrated circuits can act as a bottleneck, limiting further performance improvements in computing systems, especially due to increasing physical lengths of wired communication channels leading to communication delays.
Innovation Solution
Implementing a hybrid wired and wireless network-on-chip (NoC) communication scheme with wireless links placed spaced apart by the network diameter to facilitate efficient communication among computing nodes, reducing latency and maintaining low power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If wired communication channels are extended to connect distant computing nodes, then communication coverage is improved, but communication delays increase due to physical length limitations
Solution Approach 1:
The patent introduces wireless communication channels as intermediary means to bridge distant computing nodes without requiring long wired connections. The wireless transceivers act as mediators that enable direct communication between nodes that would otherwise require extensive wired infrastructure, thereby reducing communication delays while maintaining coverage.
Solution Approach 2:
The patent replaces the mechanical wired connection system with a wireless electromagnetic field-based communication system. This substitution eliminates the physical length constraint that causes communication delays in wired systems, allowing nodes to communicate regardless of physical distance without being bound by cable length limitations.
2Productivity
If more computing nodes are added to increase parallel processing capability, then throughput is improved, but network traffic congestion increases acting as a bottleneck
Solution Approach 1:
The patent adds a wireless communication dimension to the traditional wired network architecture. This creates multiple communication paths (wired and wireless) between computing nodes, allowing traffic to be routed through different dimensions of the network. When wired paths are congested, traffic can switch to wireless paths, effectively distributing the load and reducing bottlenecks.
Solution Approach 2:
The patent implements dynamic task allocation that considers real-time network conditions. The system can dynamically switch between wired and wireless communication modes based on current traffic patterns and congestion levels, optimizing data flow to prevent bottlenecks while maintaining high throughput as more nodes are added.
3Speed
If wireless links are placed close together to reduce latency, then communication speed is improved, but power consumption increases
Solution Approach 1:
The patent implements selective wireless link activation based on local communication needs. Instead of maintaining all wireless links active at all times, the system activates only the specific wireless transceivers needed for current computational tasks. This localized activation reduces overall power consumption while maintaining low latency for active communications.
Solution Approach 2:
The patent employs periodic task allocation that alternates between different computing nodes and communication modes. By periodically switching active wireless links based on task requirements and placing wireless links spaced by network diameter, the system achieves low average latency while allowing transceivers to enter low-power states during idle periods, thereby reducing overall power consumption.
Data Source
AI summary
Several embodiments of the present technology are related to network-on-chip based integrated circuits, methods of manufacturing or fabricating such integrated circuits, and electronic/computing devices incorporating such integrated circuits. In one embodiment, a computing device includes a substrate, a plurality of computing nodes interconnected by a plurality of interconnects on the substrate to form a wired network. The individual computing nodes include one or more computing processors. The computing device further includes a pair of wireless transceivers individually connected to one of the computing nodes and spaced apart from each other by a network diameter of the wired network.