Hydrogen Diffusion Barrier in 3D Memory CMOS Under Array
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Solution Overview
Problem
As three-dimensional memory devices scale down, hydrogen diffusion from components like silicon oxide and silicon nitride layers can adversely affect CMOS transistors, increasing leakage current and degrading device performance.
Innovation Solution
A semiconductor structure with a hydrogen diffusion barrier layer, such as a silicon nitride layer, is integrated to block hydrogen diffusion between the three-dimensional memory array and peripheral devices, maintaining electrical continuity of interconnect structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If three-dimensional memory devices are scaled down, then storage density is improved, but hydrogen diffusion from silicon oxide and silicon nitride layers increases, causing leakage current and device performance degradation
Solution Approach 1:
A silicon nitride barrier layer is introduced as an intermediary between the silicon oxide layers and the CMOS transistor channels. This barrier layer mediates the hydrogen diffusion problem by blocking hydrogen atoms from traveling from the silicon oxide through the interconnect structures to the sensitive transistor channels, thus preventing leakage current while maintaining the scaled-down device architecture
Solution Approach 2:
The interconnect structure is transformed into a composite material system consisting of multiple layers: silicon oxide dielectric layers, silicon nitride barrier layers, and metal interconnect layers. This composite structure combines the electrical insulation properties of silicon oxide with the hydrogen diffusion blocking properties of silicon nitride, creating a multi-functional interconnect system that addresses both signal transmission and hydrogen barrier requirements
2Loss of energy
If silicon nitride layers are used for their insulating properties, then electrical insulation is improved, but hydrogen diffusion barrier properties are insufficient, allowing hydrogen to reach CMOS transistors
Solution Approach 1:
The interconnect structure is segmented into functionally distinct layers: silicon oxide layers provide electrical insulation between conductors, while separate silicon nitride layers provide hydrogen diffusion blocking. This segmentation allows each material to optimize its primary function without compromise, with the silicon nitride barrier layers positioned strategically to intercept hydrogen before it reaches the CMOS transistor channels
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The hydrogen diffusion barrier effectively prevents hydrogen from reaching CMOS transistors, reducing leakage current and maintaining device performance during high-temperature annealing processes.
Implementation Method 1
a silicon nitride layer comprising a hydrogen diffusion barrier
Data Source
AI summary
A semiconductor structure includes a semiconductor device, a hydrogen diffusion barrier layer, a lower metal line structure located below the hydrogen diffusion barrier layer, an alternating stack of insulating layers and electrically conductive layers, memory stack structures vertically extending through the alternating stack in a memory array region, a through-stack contact via structure extending through the alternating stack and through the hydrogen diffusion barrier layer in the memory array region and contacting the lower metal line structure, and a through-stack insulating spacer laterally surrounding the through-stack contact via structure and extending through the alternating stack but not extending through the hydrogen diffusion barrier layer.