Hyper-abrupt Junction Superlattice for Mobility and Diffusion

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Solution Overview

Problem

Current semiconductor devices face limitations in achieving enhanced charge carrier mobility and performance due to issues such as alloy scattering and diffusion between thin layers, which affect device mobility and reliability.

Innovation Solution

The implementation of a hyper-abrupt junction region with a superlattice structure, comprising alternating semiconductor and non-semiconductor layers, such as silicon and oxygen, to reduce effective mass and enhance conductivity, while also acting as a barrier to prevent dopant diffusion and scattering, thereby improving charge carrier mobility and device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If alternating semiconductor and non-semiconductor layers are used to form a superlattice structure, then charge carrier mobility is enhanced and effective mass is reduced, but device structure becomes more complex and manufacturing difficulty increases

Engineering Contradiction:
Improvecharge carrier mobilityVSAvoidsuperlattice structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The semiconductor layer is segmented into alternating thin layers of different semiconductor materials (e.g., SiGe and Si) to form a superlattice structure. This segmentation creates multiple interfaces that reduce alloy scattering and lower the effective mass of charge carriers, thereby enhancing mobility while maintaining a manageable structural complexity through periodic repetition of the pattern.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention employs composite material structures by combining different semiconductor materials (SiGe and Si) in alternating layers. This composite approach allows exploitation of the beneficial properties of each material - SiGe provides strain engineering for mobility enhancement while Si provides a stable lattice structure - resulting in improved charge carrier mobility without excessive structural complexity.

Inventive Principle:
Principle #40Composite materials

2Speed

If thin alternating layers are used to reduce alloy scattering, then charge carrier mobility improves, but dopant diffusion between layers increases

Engineering Contradiction:
Improvecharge carrier mobilityVSAvoiddopant diffusion control
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The invention introduces intermediate barrier layers or carefully engineered interface structures between the alternating semiconductor layers. These intermediate structures act as dopant diffusion barriers while maintaining the electrical properties needed for high mobility. The barrier layers prevent dopant intermixing that would otherwise occur in direct contact between thin alternating layers, thus resolving the contradiction between mobility enhancement and dopant diffusion control.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention optimizes the thickness parameters of the alternating layers to specific ranges that simultaneously achieve high mobility and dopant diffusion control. By carefully controlling the layer thicknesses (making them thin enough to reduce alloy scattering but thick enough to prevent dopant diffusion), the patent resolves the contradiction through precise parameter selection and optimization.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If superlattice structure is implemented to reduce effective mass, then conductivity increases, but manufacturing precision requirements become more stringent

Engineering Contradiction:
Improveelectrical conductivityVSAvoidlayer thickness control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The invention identifies and optimizes specific parameter ranges for layer thicknesses that achieve the desired conductivity improvement while remaining compatible with existing manufacturing capabilities. By selecting thickness parameters that are not excessively small, the patent maintains manufacturability while still achieving the conductivity benefits of the superlattice structure.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention applies local quality variations within the superlattice structure, such as varying the thickness or composition of specific layers in different regions, to optimize both conductivity and manufacturability. This allows critical layers to have precise thickness control where needed while other layers can be manufactured with more relaxed tolerances, thus balancing conductivity requirements with manufacturing precision capabilities.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The superlattice structure achieves higher charge carrier mobility by reducing effective mass and preventing inter-diffusion, leading to improved device performance and reduced scattering effects, making it suitable for various semiconductor devices including FETs and opto-electronic devices.

Implementation Method 1

Si—Ge short period superlattice with higher mobility achieved by reducing alloy scattering in the superlattice

Methodology Applied
Scientific EffectAlloy scattering reduction:

Implementation Method 2

acting as a barrier to prevent dopant diffusion and scattering

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 3

electrons having a smaller effective mass, and which have been induced by an electric field applied to the gate electrode, are confined in the second silicon layer

Methodology Applied
Scientific EffectElectron confinement:

Data Source

PatentUS11183565B2Semiconductor devices including hyper-abrupt junction region including spaced-apart superlattices and related methods
Publication Date: 2021.11.23 ATOMERA INC
  • US11183565B2 patent drawing
  • US11183565B2 patent drawing
  • US11183565B2 patent drawing

AI summary

A semiconductor device may include a substrate and a hyper-abrupt junction region carried by the substrate. The hyper-abrupt region may include a first semiconductor layer having a first conductivity type, a first superlattice layer on the first semiconductor layer, a second semiconductor layer on the first superlattice layer and having a second conductivity type different than the first conductivity type, and a second superlattice layer on the second semiconductor layer. The semiconductor device may further include a gate dielectric layer on the second superlattice layer of the hyper-abrupt junction region, a gate electrode on the gate dielectric layer, and spaced apart source and drain regions adjacent the hyper-abrupt junction region.