Hyperdimensional Computing Device In-Memory Operations
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Hyperdimensional computing devices require complex circuit structures and significant power consumption for computational operations, which hinders their efficiency and performance.
Innovation Solution
A hyperdimensional computing device utilizing a non-volatile memory cell array and an operation circuit that generates bundled data vectors through in-memory-computing and in-memory-searching operations, reducing circuit complexity and power consumption while improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If logic circuits are applied to perform hyperdimensional computing operations, then computational functionality is achieved, but circuit complexity increases and power consumption increases
Solution Approach 1:
The patent replaces traditional logic circuit-based hyperdimensional computing operations with in-memory computing operations using non-volatile memory cells. The memory cells directly perform addition, multiplication, and permutation operations through electrical signal interactions during read/write operations, eliminating the need for separate logic circuits and significantly reducing both circuit complexity and power consumption.
Solution Approach 2:
The non-volatile memory cells serve multiple functions: they store data vectors, perform hyperdimensional computing operations (addition, multiplication, permutation), and generate bundled data vectors. This multi-functionality eliminates the need for dedicated logic circuits, reducing overall device complexity while maintaining computational capabilities.
2Productivity
If logic circuits are applied to perform hyperdimensional computing operations, then computational functionality is achieved, but power consumption increases
Solution Approach 1:
The patent replaces energy-intensive logic circuit operations with low-power in-memory computing operations. The non-volatile memory cells perform computational operations during normal read/write operations, utilizing the inherent electrical properties of the memory cells rather than requiring additional active logic circuits, thereby maintaining computational performance while significantly reducing power consumption.
3Device complexity
If non-volatile memory cell array is used for in-memory computing, then circuit complexity is reduced and power consumption is reduced, but computational operations must be performed within memory structure constraints
Solution Approach 1:
The non-volatile memory cells are designed to perform multiple hyperdimensional computing operations (addition, multiplication, permutation) through different read/write operation modes. This universality allows the memory structure to adapt to various computational requirements without requiring additional circuitry, maintaining operational flexibility while reducing complexity.
Data Source
AI summary
A hyperdimensional computing device includes a non-volatile memory cell array and a first operation circuit. The non-volatile memory cell array is coupled to a plurality of first word lines. The non-volatile memory cell array has a plurality of memory cell groups, a plurality of first memory cells of each of the memory cell groups are coupled to a same first word line of the first word lines, and the memory cell groups respectively store a plurality of data vectors. The first operation circuit receives at least one of the data vectors through bit lines and generates a bundled data vector according to the at least one of the data vectors.