Hyperspectral Image Sensor Monolithic Integration via ASALD
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Solution Overview
Problem
Conventional methods for fabricating hyperspectral image sensors face challenges with height uniformity of step structures due to etching processes, leading to device failures and restricted material selection for the transparent cavity layer.
Innovation Solution
The method involves preprocessing the CMOS image sensor wafer surface, forming a bottom reflecting layer, and using area selective atomic layer deposition (ASALD) to create a transparent cavity layer with N step structures, where N=2m, to achieve uniform step heights and broaden material selection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photolithography-etching processes are used to fabricate the transparent cavity layer with step structures, then the cavity layer can be formed with multiple step heights, but the height uniformity deteriorates due to accumulation of etching non-uniformity
Solution Approach 1:
The patent inverts the conventional fabrication approach by using deposition instead of etching to create the step structures. Specifically, it deposits a transparent cavity layer with varying thicknesses in different regions through selective deposition processes, thereby forming step structures with precise height control without the accumulation of etching non-uniformity. This fundamental process reversal resolves the height uniformity issue while reducing the number of processing steps required.
Solution Approach 2:
The patent changes the deposition parameters (such as deposition thickness, deposition rate, and deposition area) to directly control the step heights of the transparent cavity layer. By adjusting these parameters during the deposition process, precise height uniformity can be achieved across different step structures without relying on multiple etching steps, thereby resolving the contradiction between manufacturing precision and device complexity.
2Ease of manufacture
If plasma etching or wet etching is used to etch specific materials like HfO2, then the material can be removed, but the photoresist interface layer is destroyed causing photoresist lifting off
Solution Approach 1:
The patent extracts the problematic etching step from the fabrication process entirely. Instead of using plasma or wet etching that destroys the photoresist interface layer, the invention uses deposition processes to form the transparent cavity layer with step structures. This eliminates the harmful interaction between aggressive etchants and the photoresist, thereby maintaining photoresist adhesion while still achieving the desired material structuring.
Solution Approach 2:
The patent introduces a deposition process as an intermediary method to achieve material structuring without directly etching the photoresist interface. By using deposition to create the step structures in the transparent cavity layer, the process avoids the direct contact between harsh etching chemicals and the photoresist, thus preventing lifting off while still enabling precise control over the cavity layer geometry.
3Manufacturing precision
If multiple etching steps are performed to create multi-step cavity structures, then the desired step heights can be achieved, but the accumulation of etching non-uniformity increases leading to device failure
Solution Approach 1:
The patent inverts the fabrication strategy by using selective deposition instead of multiple etching steps to create the multi-step cavity structures. This single or limited number of deposition processes can achieve the same structural complexity with much better height uniformity control, thereby reducing device failure rates and improving overall productivity without sacrificing manufacturing precision.
Solution Approach 2:
The patent performs preliminary deposition of the transparent cavity layer with predetermined thickness variations in different regions. By pre-establishing the step structures through controlled deposition before any subsequent processing, the method ensures consistent height uniformity across all step structures, eliminating the cumulative non-uniformity problem that would arise from multiple etching steps and thereby improving device yield.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes height non-uniformity and reduces device failure rates, enabling faster and more cost-effective production of hyperspectral image sensors with improved material options.
Implementation Method 1
forming a transparent cavity layer on the bottom reflecting layer by using area selective atomic layer deposition (ASALD) processes
Data Source
AI summary
A method for monolithic integration of a hyperspectral image sensor is provided, which includes: forming a bottom reflecting layer on a surface of the photosensitive region of a CMOS image sensor wafer; forming a transparent cavity layer composed of N step structures on the bottom reflecting layer through area selective atomic layer deposition processes, where N=2m, m≥1 and m is a positive integer; and forming a top reflecting layer on the transparent cavity layer. With the method, non-uniformity accumulation due to etching processes in conventional technology is minimized, and the cavity layer can be made of materials which cannot be etched. Mosaic cavity layers having such repeated structures with different heights can be formed by extending one-dimensional ASALD, such as extending in another dimension and forming repeated regions, which can be applied to snapshot hyperspectral image sensors, for example, pixels, and greatly improving performance thereof.