Hypervisor Hashed Page Table Transient Address Preservation
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Solution Overview
Problem
During a firmware assisted dump procedure, guest virtual machines face challenges in preserving transient address translation information across a reboot, leading to potential access to disallowed resources and inefficient memory usage, as existing solutions require extra memory or extensive hypervisor modifications.
Innovation Solution
The method identifies and translates special host real addresses to corresponding guest real addresses within the hypervisor's hashed page table, marking them as invalid to prevent incorrect access, and provides the translated addresses to the guest during the dump process, without requiring additional memory or modifying guest OSs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the hypervisor translates host real addresses to guest real addresses during firmware assisted dump, then address translation information is preserved, but special host real addresses may incorrectly access reset hardware
Solution Approach 1:
The hypervisor identifies and translates special host real addresses to special guest real addresses before the firmware assisted dump procedure completes, and marks them as invalid. This preliminary action ensures that when the guest OS later accesses these addresses, it receives the correct guest real addresses rather than attempting to access reset hardware, thus preventing incorrect hardware access while preserving address translation information
Solution Approach 2:
The hypervisor applies a counter-action by marking the translated special guest real addresses as invalid in the page table. This preliminary anti-action prevents the guest OS from using these addresses to access hardware that has been reset, thereby counteracting the potential harmful effect of incorrect hardware access while maintaining the preserved address translation information
2Loss of information
If the hypervisor preserves all address translation information, then complete debug information is available, but additional memory is required
Solution Approach 1:
The hypervisor extracts only the necessary address translation information from the page table by identifying and translating only the special host real addresses that require preservation. By selectively taking out only the critical translation entries rather than preserving all address translation information, the system avoids requiring additional memory while still maintaining the essential debug information needed for firmware assisted dump
3Ease of operation
If the guest OS manages the hashed page table, then the guest can preserve its own translation information, but the hypervisor cannot control access to hardware devices
Solution Approach 1:
The hypervisor acts as an intermediary by maintaining knowledge of which host real addresses are special and require translation to guest real addresses. When the guest OS manages the hashed page table and requests translation information, the hypervisor intervenes to identify and translate the special host real addresses, marking them as invalid. This intermediary action allows the guest to manage its page table while the hypervisor ensures proper hardware access control is maintained
Data Source
AI summary
Within a hashed page table maintained by a hypervisor, a special host real address configured to access a hardware device using access data intended to be invalidated is identified as part of a firmware assisted dump process for a virtual machine executing on the hypervisor. The special host real address is translated to a corresponding special guest real address. Within the hashed page table, the special host real address is replaced with the corresponding special guest real address, and the corresponding special guest real address is marked as invalid and requiring special handling. Subsequent to the replacing, the special host real address is invalidated. The special guest real address and translated address information are provided to the virtual machine subsequent to the invalidating, the translated address information comprising a set of host real addresses translated to corresponding guest real addresses.