Hypervisor Buffer Exchange for VM Communication

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Solution Overview

Problem

Existing communication methods between virtual machines under a hypervisor lack data consistency and temporal separation, leading to potential breaches and inefficiencies, especially when dealing with continuous data streams and varying access speeds.

Innovation Solution

The method employs a hypervisor-managed queuing buffer system with atomic operations, memory protection units, and buffer address management to ensure asynchronous communication, maintaining temporal and spatial separation between virtual machines, and minimizing runtime overhead by reconfiguring memory protection for continuous access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If virtual machines communicate directly through shared memory without hypervisor management, then communication speed is improved, but data consistency and temporal separation are compromised

Engineering Contradiction:
Improvecommunication speedVSAvoiddata consistency
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The hypervisor acts as an intermediary between virtual machines, managing buffer access through memory protection units. The hypervisor reconfigures MPU permissions to enable direct VM-to-VM buffer access while maintaining control over access rights, thus preserving both communication speed and data consistency through centralized management of the intermediary layer.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The shared memory is segmented into distinct buffer regions (read buffer, write buffer, queuing buffer) with specific access permissions. Each buffer segment is protected by separate memory protection unit configurations, allowing simultaneous access by different virtual machines while maintaining data consistency through spatial separation and controlled access paths.

Inventive Principle:
Principle #1Segmentation

2Reliability

If memory protection units are reconfigured for each buffer exchange, then data security is improved, but runtime overhead increases

Engineering Contradiction:
Improvedata securityVSAvoidruntime overhead
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Memory protection unit configurations are prepared in advance for different buffer access scenarios. The hypervisor pre-establishes permission sets for read buffers, write buffers, and queuing buffers, allowing rapid switching between pre-configured protection states during runtime without performing complex reconfiguration operations for each buffer exchange.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory protection unit configurations are dynamically adjusted based on the current buffer exchange requirements. The hypervisor optimizes MPU permission settings to grant minimal necessary access rights for each operation, reducing the overhead of maintaining strict protection while enabling efficient buffer sharing between virtual machines.

Inventive Principle:
Principle #15Dynamics

3Productivity

If buffers are exchanged between virtual machines, then communication efficiency is improved, but temporal separation may be breached

Engineering Contradiction:
Improvecommunication efficiencyVSAvoidtemporal separation
Core Design Contradiction:
ProductivityVSStability of the object's composition

Solution Approach 1:

The system transitions from temporal synchronization to spatial separation for maintaining isolation between virtual machines. Buffers are organized in distinct memory regions with hierarchical access control, allowing efficient data exchange while preserving temporal independence through spatial organization and permission-based access management rather than time-based coordination.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10248354B2Hypervisor enabling secure communication between virtual machines by managing exchanging access to read buffer and write buffer with a queuing buffer
Publication Date: 2019.04.02 ROBERT BOSCH GMBH
  • US10248354B2 patent drawing
  • US10248354B2 patent drawing
  • US10248354B2 patent drawing

AI summary

A hypervisor manages a read buffer, a write buffer and a queuing buffer in a memory used jointly by the first virtual machine and the second virtual machine, the read buffer, the write buffer and the queuing buffer having the same size. The hypervisor assigns the read buffer to a read area readable by the first virtual machine, assigns the write buffer to a write area writable by the second virtual machine and assigns the queuing buffer to a queuing area of the memory that is inaccessible to the first virtual machine and to the second virtual machine. In response to a first request by the first virtual machine, the hypervisor performs a reader-side exchange of the read buffer for the queuing buffer and in response to a second request by the second virtual machine, the hypervisor performs a writer-side exchange of the write buffer for the queuing buffer.