Primary Secondary Hypervisor Coordination Across Heterogeneous Processors
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Solution Overview
Problem
Designing a hypervisor that can be concurrently executed across processors with different instruction set architectures is challenging, particularly in multi-processor devices like mobile phones, where CPUs and DSPs have distinct architectures, making it difficult to execute multiple operating systems efficiently.
Innovation Solution
Implementing a primary hypervisor that runs on one set of processors with a different instruction set architecture than secondary hypervisors, which restricts certain operations and forces secondary hypervisors to rely on the primary hypervisor for security and resource management, while allowing them to perform task scheduling independently to maintain quality of service guarantees.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single hypervisor is designed to run across multiple processor sets with different instruction set architectures, then versatility and adaptability improve, but device complexity and difficulty of design increase significantly
Solution Approach 1:
The system divides the hypervisor functionality into separate instances: a first hypervisor for the first processor set and a second hypervisor for the second processor set. Each hypervisor instance is designed independently for its specific processor architecture, reducing the complexity of designing a single universal hypervisor while maintaining adaptability across different architectures.
Solution Approach 2:
The patent introduces a communication interface that acts as an intermediary between the first and second hypervisors. This intermediary enables coordinated operation and resource sharing between the separate hypervisor instances, allowing them to work together as a unified system while maintaining architectural independence.
2Productivity
If multiple hypervisors are executed concurrently on different processor sets, then productivity and efficiency improve, but ensuring security and resource management becomes more difficult
Solution Approach 1:
The patent merges the resource management and security control functions into a centralized hypervisor management system. The first and second hypervisors communicate through a standardized interface that enables coordinated resource allocation and unified security policies, allowing multiple hypervisors to operate concurrently while maintaining centralized control over security and resource management.
3Loss of time
If secondary hypervisors perform independent task scheduling, then quality of service and latency guarantees improve, but coordination and resource conflicts increase
Solution Approach 1:
The patent implements dynamic scheduling where the second hypervisor can independently schedule tasks for the second processor set while maintaining communication with the first hypervisor. This dynamic coordination allows each hypervisor to optimize task scheduling for its processor set, reducing latency for guest operating systems while maintaining overall system coordination through the communication interface.
Data Source
AI summary
An apparatus includes a primary hypervisor that is executable on a first set of processors and a secondary hypervisor that is executable on a second set of processors. The primary hypervisor may define settings of a resource and the secondary hypervisor may use the resource based on the settings defined by the primary hypervisor. For example, the primary hypervisor may program memory address translation mappings for the secondary hypervisor. The primary hypervisor and the secondary hypervisor may include their own schedulers.