Hypervisor-Assisted Distributed Memory Mapping

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Solution Overview

Problem

Existing distributed computing systems face challenges in efficiently scaling multiple processor clusters due to limited address spaces in BIOS and increased complexity in supporting global memory spaces, leading to difficulties in booting up and resource management across clusters.

Innovation Solution

Deploying a hypervisor on each cluster to map remote memory segments to local memory spaces, allowing processors to access remote memory, and using extended memory spaces to facilitate global resource management, enabling efficient booting and operation of global virtual machines across multiple clusters.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple processor clusters are incorporated into a distributed system, then system scalability and computing power are improved, but address space limitations in BIOS and complexity in supporting global memory spaces increase

Engineering Contradiction:
Improvesystem scalabilityVSAvoidaddress space management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces an external node controller (XNC) as an intermediary component that mediates between processor clusters and memory spaces. The XNC manages address translation and memory access across clusters, eliminating the need for complex BIOS address space management while enabling scalable distributed memory access.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent transitions from a single-node memory address space model to a distributed multi-node memory address space model. By introducing a new dimension of cluster-level memory management with XNC, the system can address memory across multiple clusters without being constrained by traditional BIOS address space limitations.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of operation

If remote memory segments are mapped to local memory spaces, then processor access to remote memory is enabled, but system complexity increases

Engineering Contradiction:
Improvememory access capabilityVSAvoidmemory mapping complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The XNC acts as an intermediary that handles memory mapping between local and remote memory segments. It translates memory addresses and manages the mapping relationships, enabling processors to access remote memory through simplified local address interfaces without exposing the complexity of distributed memory management to the processor.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates virtual copies of remote memory segments in local address spaces through the XNC. This allows processors to access remote memory as if it were local, with the XNC maintaining the actual physical mapping and handling all complex address translation operations transparently.

Inventive Principle:
Principle #26Copying

3Ease of manufacture

If BIOS independently boots up processor clusters, then booting process is simplified, but support for global memory spaces becomes difficult

Engineering Contradiction:
Improvebooting process simplicityVSAvoidglobal memory space support
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent introduces a preliminary boot phase where the XNC is initialized and configured to manage global memory spaces before the main operating system loads. This preliminary setup of the XNC enables subsequent independent BIOS booting of processor clusters while maintaining global memory space support, as the XNC is already in place to handle address translation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The XNC serves as a mediator between the independent BIOS boot process and global memory space requirements. It allows each processor cluster to boot independently through its own BIOS while the XNC coordinates and manages the global memory space allocation and address translation across all clusters.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240345857A1Hypervisor-assisted scalable distributed systems
Publication Date: 2024.10.17 HEWLETT PACKARD ENTERPRISE DEV LP
  • US20240345857A1 patent drawing
  • US20240345857A1 patent drawing
  • US20240345857A1 patent drawing

AI summary

A first hypervisor running on a first processor cluster is provided. During operation, the first hypervisor can determine a first set of processing nodes and a first memory unit of the first processor cluster in response to the booting up of a first Basic Input/Output System (BIOS) of the first processor cluster. The first hypervisor can discover a second hypervisor running on a second processor cluster comprising a second set of processing nodes and a second memory unit. The first hypervisor can operate, with the second hypervisor, a distributed system comprising the first and second sets of processing nodes and the first and second memory units. The first hypervisor can then operate, with the second hypervisor, a global virtual machine on the distributed system. The virtual memory space of the global virtual machine can be mapped to respective memory spaces of the first and second processor clusters.