Hardware Virtualization for Low Power Mode Memory Mapping
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Solution Overview
Problem
Existing computing systems face challenges in fully shutting down all components except for RAM during low power modes, such as Suspend-to-RAM, while ensuring that programs can be restarted from the exact state before entering the low power mode, due to issues with memory mapping configuration being overwritten during wake-up.
Innovation Solution
A computing system that uses hardware virtualization to store program information in user or operating system mode and processor state information in hypervisor mode, allowing it to disable hardware components while retaining memory power, and then restore the processor state and program data upon waking up, using a predefined memory mapping to prevent overwriting.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the memory management unit is shut down during low power mode to save power, then power consumption is reduced, but the memory mapping configuration is overwritten during wake-up causing system instability
Solution Approach 1:
The patent segments the memory management functionality by separating the MMU into two distinct modes: user mode for normal operation and hypervisor mode for power management. This segmentation allows the MMU to be shut down in user mode while preserving configuration in hypervisor mode, resolving the contradiction between power saving and mapping stability.
Solution Approach 2:
The hypervisor mode acts as an intermediary layer between the user mode MMU and the physical hardware. It preserves the memory mapping configuration and processor state information, serving as a mediator that maintains system state during power management transitions without requiring the MMU to remain fully operational.
2Loss of energy
If all hardware components are shut down except RAM during low power mode, then power saving is maximized, but program restart capability is compromised due to memory mapping conflicts
Solution Approach 1:
Before shutting down hardware components, the system performs preliminary actions by storing processor state information and memory mapping configurations in the hypervisor mode memory region. This preliminary preservation ensures that when the system wakes up, the MMU can be restored to its previous configuration without conflicts, enabling reliable program restart.
Solution Approach 2:
The patent creates a copy of the memory mapping configuration and processor state in the hypervisor mode memory region. This copy serves as a backup that can be restored during wake-up, allowing the system to recover program state even though the original MMU configuration may have been overwritten during the shutdown process.
3Ease of manufacture
If the boot loader uses new memory mapping from the memory management unit during wake-up, then system initialization is simplified, but the previous memory mapping configuration is overwritten causing memory mapping scrambling
Solution Approach 1:
The hypervisor mode serves as an intermediary that preserves the original memory mapping configuration. During wake-up, instead of directly overwriting the MMU configuration, the system uses the hypervisor mode as a mediator to restore the previous mapping, preventing information loss while maintaining initialization simplicity.
Solution Approach 2:
The system applies preliminary anti-action by proactively preserving the memory mapping configuration in hypervisor mode before the boot loader attempts to reconfigure the MMU. This preemptive measure counteracts the harmful effect of configuration overwriting, ensuring the original mapping is restored rather than lost.
Data Source
AI summary
This application discloses a computing system that can enter into a low power mode, shut down all components except for memory, and exit from the low power mode and restore running programs where they left off before entering the low power mode. To enter the low power mode, a processing device, in a user mode, can store program information to a memory. The processing device can switch to a hypervisor mode and store processor state information to a reserved portion of the main memory. The computing system can then disable hardware components of the computing system. To exit the low power mode, the computing system can enable the hardware components of the computing system, and activate the hypervisor mode of the processing device, allowing retrieval of the processor state information. The processing device can switch to the user mode and load stored the program information from the main memory.