Hypervisor Memory Synchronization via Checksum Verification
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Solution Overview
Problem
Existing fault-tolerant computing systems face memory inconsistencies between synchronized devices, which can lead to failure in maintaining identical memory copies, causing disruptions when the primary device fails.
Innovation Solution
The solution involves generating and comparing verification signatures, such as checksums, for memory pages between two computing devices to identify and correct inconsistencies iteratively and continuously, ensuring synchronized memory without halting processing for extended periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory pages are continuously copied from the first computing device to the second computing device to maintain synchronization, then the reliability of the backup system is improved, but the complexity of detecting and measuring memory inconsistencies increases
Solution Approach 1:
The patent implements a feedback mechanism where verification signatures (checksums) are continuously generated from memory pages on both computing devices and compared to detect inconsistencies. When inconsistencies are detected, the system provides feedback by triggering corrective actions such as re-copying the affected memory pages from the first device to the second device, thereby maintaining synchronization reliability through continuous monitoring and self-correction
Solution Approach 2:
The patent introduces verification signatures (checksums) as an intermediary element to facilitate the comparison of memory pages between the two computing devices. Instead of directly comparing entire memory pages which would be complex and time-consuming, the checksums serve as simplified intermediaries that represent the content integrity of memory pages, making inconsistency detection more manageable while maintaining reliability
2Measurement precision
If verification signatures are generated and compared for all memory pages at each checkpoint, then the precision of memory consistency detection is improved, but the productivity of the system decreases due to processing delays
Solution Approach 1:
The patent applies partial action by generating verification signatures only for memory pages that have been modified since the last checkpoint, rather than re-verifying all memory pages. This selective approach maintains detection precision for changed pages while significantly reducing the overall verification workload, thereby preserving system productivity without compromising the precision of consistency detection
3Reliability
If the system performs iterative verification and correction of memory pages during each checkpoint, then the reliability of memory synchronization is improved, but the loss of time increases due to continuous verification overhead
Solution Approach 1:
The patent implements periodic verification at predetermined checkpoints rather than continuous verification between checkpoints. Memory pages are copied and verified periodically at these checkpoints, which maintains synchronization reliability while minimizing the time overhead by allowing normal processing to continue uninterrupted between checkpoint intervals
Data Source
AI summary
Mechanisms for reducing memory inconsistencies between two synchronized computing devices are provided. A first hypervisor module of a first computing device iteratively determines that content of a memory page of a plurality of memory pages has been modified. The content of the memory page is sent to a second hypervisor module on a second computing device. At least one other memory page of the plurality of memory pages is identified, and a verification value based on the content of the at least one other memory page is generated. The verification value and a memory page identifier that identifies the at least one other memory page is sent to the second hypervisor module on the second computing device.