Hypervisor Page Table Switching for Guest Code Security

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Solution Overview

Problem

Existing virtual machine systems face challenges in deploying performance and security solutions due to guest code modification requirements, hypervisor dependency, and maintenance overhead, as well as difficulties in switching between hypervisors and discovering allowed guest functions.

Innovation Solution

The system splits guest code into multiple parts, each loaded at distinct guest addresses and granted access to its own set of page tables, allowing execution without modification, and uses a hypervisor to manage page table switching and access control to prevent unauthorized execution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If guest code is modified to execute host page table instructions, then performance and security are improved, but guest code portability and ease of operation deteriorate

Engineering Contradiction:
ImprovesecurityVSAvoidguest code portability
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent segments guest code into multiple parts, each loaded at distinct guest addresses and granted access to its own set of page tables. This segmentation allows different code segments to have different access permissions without modifying the guest code itself, resolving the contradiction between security improvements and code portability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a hypervisor as an intermediary layer that manages page table switching and access control. The hypervisor detects execution page faults, locates the appropriate page tables, and switches to them, enabling security control without requiring guest code modification, thus maintaining code portability while improving security.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If multiple page tables are maintained for different guest functions, then access control precision is improved, but device complexity increases

Engineering Contradiction:
Improveaccess control precisionVSAvoidpage table management complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent implements a self-service mechanism where the hypervisor automatically responds to execution page faults by locating and switching to the appropriate page tables. This automated self-service approach manages the complexity of multiple page tables without requiring manual intervention, maintaining access control precision while reducing operational complexity.

Inventive Principle:
Principle #25Self-service

3Reliability

If guest code is split into multiple parts with distinct page tables, then security and performance are improved, but maintenance overhead increases

Engineering Contradiction:
ImprovesecurityVSAvoidmaintenance overhead
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent creates a universal page table management mechanism that handles multiple guest code segments through a common hypervisor interface. The hypervisor provides multi-functional capabilities by managing different page tables for different guest functions through a unified approach, reducing maintenance overhead despite the segmentation of guest code for security purposes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10387184B2Address based host page table selection
Publication Date: 2019.08.20 RED HAT ISRAEL
  • US10387184B2 patent drawing
  • US10387184B2 patent drawing
  • US10387184B2 patent drawing

AI summary

A page table selection system includes a memory, a processor in communication with the memory, a virtual machine, and a hypervisor. The virtual machine includes a guest executing on the processor. The hypervisor executes on the processor to grant the guest a first access to a first data structure in a first set of page tables and the second guest a second access to a second data structure in a second set of page tables. A first and second guest address range are executable in the first and second sets of page tables respectively. The hypervisor executes on the processor to detect an execution page fault at an address within the second address range, locate the second set of page tables, and switch to the second set of page tables.