Hypervisor Persistent Memory Emulation via Volatile Allocation

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Solution Overview

Problem

Existing computer systems face challenges in implementing persistent memory without the need for custom hardware, as current solutions like NVDIMMs are expensive and require specialized components.

Innovation Solution

The OS or hypervisor allocates a portion of volatile memory as persistent memory, using a battery and conventional nonvolatile storage to save and restore data during power loss and restoration, allowing for efficient implementation without custom hardware.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If NVDIMM is used to implement persistent memory, then data persistence is achieved, but cost increases significantly

Engineering Contradiction:

Improvedata persistenceVSAvoidcost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent creates a virtual copy of persistent memory functionality through software emulation. The hypervisor intercepts memory access requests and implements persistence logic in software, copying the behavior of true persistent memory without requiring specialized hardware. This allows standard DRAM to be used while achieving persistent memory characteristics through virtualization and software control.

Inventive Principle:

Principle #26Copying

Solution Approach 2:

The patent replaces the mechanical/hardware-based persistent memory solution (NVDIMM with specialized controller and battery) with a software-based approach. The persistence functionality is implemented through hypervisor software that intercepts and manages memory operations, substituting physical persistent memory hardware with virtualized software control layers.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If NVDIMM is used to implement persistent memory, then data persistence is achieved, but device complexity increases

Engineering Contradiction:

Improvedata persistenceVSAvoidhardware complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a hypervisor layer as an intermediary between the application and the physical memory hardware. This intermediary intercepts memory access requests, manages persistence operations, and coordinates between volatile DRAM and nonvolatile storage, simplifying the overall system by removing the need for complex specialized persistent memory hardware controllers.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The hypervisor provides multiple functions through a single software component: it manages memory allocation, intercepts access requests, handles persistence operations, and coordinates data transfer between volatile and nonvolatile storage. This multi-functional approach replaces the need for specialized persistent memory hardware that would require separate controllers and management logic.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Reliability

If entire persistent memory allocation is saved to nonvolatile storage upon power loss, then data safety is ensured, but save time increases

Engineering Contradiction:

Improvedata safetyVSAvoidsave time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent implements selective saving of only the dirty (modified) portions of memory rather than the entire persistent memory allocation. The hypervisor tracks which memory pages have been modified and saves only those pages to nonvolatile storage upon power loss detection, reducing the save time while ensuring that all modified data is preserved.

Inventive Principle:

Principle #16Partial or excessive action

Solution Approach 2:

The patent performs periodic flushing of dirty pages to nonvolatile storage before power loss occurs. By proactively saving modified data in the background during normal operation, the system reduces the amount of data that needs to be saved in the emergency power loss scenario, thereby reducing the critical save time when power is actually lost.

Inventive Principle:

Principle #10Preliminary action

4Ease of manufacture

If persistent memory is implemented using existing components, then cost is reduced, but save operation optimization becomes more challenging

Engineering Contradiction:

ImprovecostVSAvoidsoftware complexity

Core Design Contradiction:

Ease of manufactureVSDevice complexity

Solution Approach 1:

The hypervisor serves as an intermediary that manages the complexity of coordinating between volatile DRAM and nonvolatile storage. It intercepts memory access requests, tracks dirty pages, manages data transfer, and handles persistence logic, thereby abstracting the software complexity and making the system manageable despite using standard components rather than specialized hardware.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS11422860B2Optimizing save operations for OS/hypervisor-based persistent memory

Publication Date: 2022.08.23 VMWARE INC

AI summary

In one embodiment, an operating system (OS) or hypervisor running on a computer system can allocate a portion of the volatile memory of the computer system as a persistent memory allocation. The OS/hypervisor can further receive a signal from the computer system's Basic Input/Output System (BIOS) indicating an alternating current (AC) power loss or cycle event and, in response to the signal, can save data in the persistent memory allocation to a nonvolatile backing store. Then, upon restoration of AC power to the computer system, the OS/hypervisor can restore the saved data from the nonvolatile backing store to the persistent memory allocation.