Hypervisor Shadow Stack for Kernel Memory Security
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Solution Overview
Problem
Existing memory management methods for security in electronic devices are inadequate in protecting against vulnerabilities such as return-oriented programming (ROP) attacks, which can corrupt memory and escalate privileges, especially since kernel-level security measures can be bypassed.
Innovation Solution
A memory management method that utilizes a hypervisor with a higher privilege level than the kernel to obtain, store, and verify addresses for memory areas, identify defective addresses, and recover from address defects, thereby enhancing security against ROP attacks and other memory corruption vulnerabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If kernel-level security measures are implemented to protect memory areas, then security protection is provided, but these measures can be bypassed by sophisticated attacks such as ROP
Solution Approach 1:
The patent introduces a shadow stack as an intermediary structure between the kernel stack and the execution flow. This shadow stack stores return addresses separately from the kernel stack, creating a mediation layer that prevents direct manipulation of return addresses by malicious code. The shadow stack acts as a buffer that validates and protects the integrity of return addresses used in ROP attacks, thereby resolving the vulnerability while maintaining kernel-level security measures.
Solution Approach 2:
The patent divides the stack structure into multiple segments: the original kernel stack and a separate shadow stack. By segmenting the return address storage into distinct regions with different protection mechanisms, the system can protect critical return addresses in the shadow stack while allowing the kernel stack to function normally. This segmentation prevents attackers from compromising the entire stack structure through single-point attacks.
2Reliability
If memory addresses are validated and protected, then security against memory corruption is improved, but system complexity increases due to additional validation layers
Solution Approach 1:
The patent creates a copy of the return address stack in the shadow stack structure. Instead of modifying the original kernel stack with complex validation logic, the system copies essential return address information to a protected shadow stack that can be validated more easily. This copying approach maintains security while keeping the validation mechanism relatively simple and focused on specific critical data.
Solution Approach 2:
The patent extracts the return address validation function from the general kernel memory management system and places it in a dedicated shadow stack structure. By taking out the critical return address validation from the complex kernel memory management framework, the system can implement focused, simpler validation logic specifically for return addresses without burdening the entire memory management system with additional complexity.
Data Source
AI summary
According to various embodiments, an electronic device comprises: at least one processor; and memory operatively connected to the at least one processor, wherein the memory may store instructions which, when executed by the at least one processor, cause the electronic device to: obtain, from a kernel, at least one address for a first memory area accessible through the kernel; store the at least one address in a second memory area accessible through a hypervisor; based on obtaining an address stored in a kernel stack from the kernel, identify whether the obtained address is defective, on the basis of the at least one stored address; and restore the defective address using at least one address stored in the second memory area in response to identifying the defect in the address.