Hypervisor Trace Analysis for Virtual Machine Execution Accuracy

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Solution Overview

Problem

In virtual computer systems, accurately monitoring the processing flow and overhead of virtual machines is challenging due to difficulties in identifying instruction execution and processing content, especially when virtual machines cannot operate directly on physical CPUs, leading to inaccurate execution time collection and increased processing complexity.

Innovation Solution

A virtual computer system with a hypervisor that collects trace information and symbol map information from context saving and management areas, respectively, and associates them to analyze processing flows, enabling accurate identification of processes and functions, thus improving maintainability and resource efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If virtual machines operate on a hypervisor without direct physical CPU access, then resource virtualization and multi-OS support are improved, but execution time measurement accuracy deteriorates

Engineering Contradiction:
Improvevirtualization capabilityVSAvoidexecution time measurement accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent introduces a timing stamp mechanism as an intermediary between the hypervisor and virtual machines. The hypervisor writes timing stamps to a shared memory area when context switching occurs, and the timing information is later read and processed to calculate accurate execution times. This intermediary approach allows accurate timing measurement without requiring direct physical CPU access or modifying the virtual machine execution path.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent performs preliminary actions by having the hypervisor write timing stamps to shared memory areas before context switching occurs. These timing stamps are prepared in advance and stored in a location accessible to both the hypervisor and virtual machines, enabling accurate execution time calculation without requiring real-time intervention during context switching.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If virtual interrupt mechanisms are used to collect execution time information, then execution time accuracy is improved, but processing complexity and overhead increase

Engineering Contradiction:
Improveexecution time accuracyVSAvoidprocessing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the timing measurement function from the complex virtual interrupt mechanism and implements it through a simpler timing stamp approach. Instead of using virtual interrupts to capture timing information, the system writes timing stamps directly to shared memory areas, separating the timing measurement function from the interrupt handling complexity and reducing overall processing complexity.

Inventive Principle:
Principle #2Taking out (Extraction)

3Loss of information

If detailed trace information is collected from context saving areas, then processing flow analysis capability is improved, but system overhead increases

Engineering Contradiction:
Improveprocessing flow information completenessVSAvoidsystem overhead
Core Design Contradiction:
Loss of informationVSLoss of energy

Solution Approach 1:

The patent extracts only the necessary timing and identification information from the context saving areas, rather than collecting complete trace information. By selectively extracting timing stamps and virtual CPU identifiers from the context saving areas, the system achieves sufficient processing flow analysis capability while minimizing the overhead associated with collecting and processing detailed trace information.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS9524180B2Managing virtual machines using tracing information
Publication Date: 2016.12.20 FUJITSU LTD
  • US9524180B2 patent drawing
  • US9524180B2 patent drawing
  • US9524180B2 patent drawing

AI summary

A virtual computer system including multiple virtual machines operating on a hypervisor, includes a trace information collecting section in the hypervisor configured to collect trace information including an operational state of a process on a first virtual machine of the multiple virtual machines from a context saving area corresponding to the first virtual machine, the process being executed when an interrupt is generated; multiple symbol map information collecting sections in the virtual machines, respectively, configured to collect symbol map information for identifying a process operating on each of the virtual machines from a management area included in each of the virtual machines to send the collected symbol map information to the hypervisor; and an analysis processing section in the hypervisor configured to associate the trace information with the symbol map information for each of the processes.