Hysteresis Power-On Circuit for Mixed-Oxide Enable Control
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Solution Overview
Problem
The integration of thin gate oxide devices for digital circuits and thick gate oxide devices for analog circuits in semiconductor processes becomes increasingly challenging due to the larger dimensions of IO devices, leading to area inefficiencies and power-on control complexities.
Innovation Solution
A power-on control (POC) circuit with a hysteresis block and core-voltage-gated device is employed to generate enabling and disabling voltage levels based on trigger levels, using both core and IO devices to manage power supply voltages and enable/disable circuit blocks effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thick gate oxide devices are used for analog circuits, then reliability and noise immunity are improved, but device area increases
Solution Approach 1:
The patent segments the semiconductor device into two distinct types: thin oxide devices for digital circuits and thick oxide devices for analog circuits. This segmentation allows each device type to be optimized for its specific function, with thick oxide devices providing noise immunity for analog circuits without requiring the entire chip to use thick oxide technology, thereby limiting the area impact to only the analog portions.
Solution Approach 2:
The patent applies local quality by using thick gate oxide layers specifically in analog devices where noise immunity is critical, while thin gate oxide layers are used in digital devices where area efficiency is paramount. This localized application of thick oxide technology ensures reliability where needed without unnecessarily increasing overall device area.
2Reliability
If thick gate oxide devices are used for analog circuits, then noise immunity is improved, but integration with thin oxide devices becomes more challenging
Solution Approach 1:
The patent segments the device portfolio into thin oxide and thick oxide device families, each with optimized characteristics for their respective applications. This segmentation simplifies integration by allowing independent optimization and testing of each device type before combining them in mixed-signal circuits, rather than attempting to create a universal device that must compromise between conflicting requirements.
Solution Approach 2:
The patent introduces power-on control circuits as intermediary elements that manage the interaction between thin oxide and thick oxide devices. These control circuits monitor power supply voltages and selectively enable or disable circuit blocks, facilitating smooth integration and coordination between the two device types with different electrical characteristics.
3Ease of operation
If power-on control circuits are implemented, then enable/disable operations are improved, but circuit complexity increases
Solution Approach 1:
The patent merges the power-on control functionality directly into the existing circuit blocks by integrating control logic and power management elements within the same circuit structures. This consolidation provides efficient enable/disable operations without adding separate, standalone control circuits, thereby minimizing the increase in overall circuit complexity.
Solution Approach 2:
The power-on control circuits are designed to automatically monitor power supply voltages and autonomously perform enable/disable operations based on predefined voltage thresholds. This self-service capability eliminates the need for external control logic or manual intervention, simplifying the overall system while maintaining operational efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The POC circuit provides fast voltage transitions with reduced power consumption and noise immunity, ensuring efficient and reliable enable/disable operations of circuit blocks.
Implementation Method 1
the hysteresis block is configured to generate an output voltage at a disabling voltage level and at an enabling voltage level in response to an input voltage
Data Source
AI summary
A semiconductor device includes a hysteresis block coupled to a control node for generating an output voltage at a disabling voltage level and at an enabling voltage level, a core-voltage-gated (CVG) device, and at least one resistive device. The CVG device includes first and second transistors serially coupled between the control node and a ground node. The first transistor has a first gate to receive a core voltage. The second transistor has a second gate to receive a reference voltage at a peak core voltage level of the core voltage. The CVG device is configured to alter a control voltage at the control node to cause the output voltage of the hysteresis block to be generated at either the disabling voltage level or the enabling voltage level in response to the core voltage. The at least one resistive device is coupled between a power supply node and the control node.