Hysteresis Receiver Circuit With Constant Noise-Rejection Window
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Solution Overview
Problem
Existing receiver circuits face challenges in implementing a power and area efficient design with constant hysteresis for noise rejection, as they often result in varying hysteresis windows due to fabrication variations and consume substantial power and space due to the use of large transistors.
Innovation Solution
A hysteresis receiver circuit is designed with two inverters and a logic controller, where the inverters have distinct threshold voltages (Vil and Vih) to define a constant hysteresis window, and the logic controller propagates the appropriate output based on the inverted values from these inverters, allowing for efficient noise rejection without opposing forces and enabling implementation with smaller transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If traditional hysteresis receiver circuits are implemented to reject noise, then noise rejection capability is improved, but power consumption and area increase due to the use of large transistors
Solution Approach 1:
The patent changes the operating parameters by using smaller transistors with different threshold voltages (first threshold voltage for the first inverter, second threshold voltage for the second inverter) to achieve the required hysteresis window. This parameter change allows noise rejection functionality to be maintained while significantly reducing the size and power consumption compared to traditional large transistor implementations.
2Object-affected harmful factors
If traditional hysteresis receiver circuits are implemented to reject noise, then noise rejection capability is improved, but device area increases due to the use of large transistors
Solution Approach 1:
The patent uses smaller transistors with carefully selected threshold voltages to achieve the required hysteresis window, significantly reducing the circuit area compared to traditional large transistor implementations while maintaining noise rejection capability.
Solution Approach 2:
The hysteresis function is segmented into two separate inverters with different threshold voltages, where the first inverter has a first threshold voltage and the second inverter has a second threshold voltage. This segmentation allows each transistor to be smaller while collectively achieving the required hysteresis window for noise rejection.
3Object-affected harmful factors
If hysteresis window is increased to improve noise rejection, then noise rejection capability is improved, but hysteresis becomes variable due to fabrication variations
Solution Approach 1:
The patent carefully selects and controls the threshold voltages of the two inverters to define a specific hysteresis window. By using smaller transistors with precisely controlled threshold voltages rather than relying on large transistors with opposing forces, the design achieves a more stable and consistent hysteresis window that is less sensitive to fabrication variations, temperature, and voltage changes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design achieves a power and area-efficient constant hysteresis receiver that effectively rejects noise, is independent of fabrication process, temperature, and voltage variations, and reduces power consumption while maintaining consistent hysteresis characteristics across units.
Implementation Method 1
A hysteresis receiver circuit is designed with two inverters and a logic controller, where the inverters have distinct threshold voltages (Vil and Vih) to define a constant hysteresis window
Data Source
AI summary
A hysteresis receiver containing two inverters and a logic controller. The inverters are implemented with threshold voltages equaling Vil and Vih, which together define the hysteresis window. The inverters receive the input signal and generate a respective inverted value. The logic controller propagates as output one of the two inverted values if the two inverted values are equal, and a prior value (corresponding to a previous sample) if the two inverted values are not equal. A receiver circuit with a hysteresis window defined by Vil and Vih, is obtained as a result.