Hysteretic Buck-Boost Control for Mode Transition Stability
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Solution Overview
Problem
Conventional voltage regulators face significant mode transition regulation challenges between buck, buck-boost, and boost modes, particularly near the buck-boost boundary, and have complexity and performance issues due to fixed clock systems and added patches.
Innovation Solution
A hysteretic current mode buck-boost control architecture is implemented, which improves mode transitions and load transient response by using a buck-boost charger controller with four switching states and a current mode control modulator to regulate voltage levels effectively across different modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional fixed clock systems and added patches are used to manage mode transitions, then voltage regulation can be maintained, but device complexity increases and performance deteriorates
Solution Approach 1:
The patent removes the fixed clock system and added patches from the control architecture, extracting the problematic elements that caused complexity and performance issues. The solution uses a natural hysteretic control mechanism that operates without these artificial additions, allowing mode transitions to occur smoothly through the inherent properties of the buck-boost converter circuitry.
Solution Approach 2:
The control architecture is designed to handle buck, boost, and buck-boost modes using a single unified hysteretic control mechanism. This universal approach eliminates the need for separate control paths or patches for different operating modes, reducing overall system complexity while maintaining reliable voltage regulation across all modes.
2Reliability
If conventional fixed clock systems are used for mode transitions, then switching frequency can be controlled, but transient response speed decreases
Solution Approach 1:
The patent transitions from a static fixed clock system to a dynamic hysteretic control mechanism where the switching frequency naturally adapts to load conditions and mode transitions. The control loop continuously adjusts switching based on the difference between output and reference voltages, enabling faster transient response while maintaining stability through the inherent damping of the hysteretic comparison process.
3Reliability
If added patches are implemented to smooth mode transitions, then regulation can be maintained, but device complexity increases
Solution Approach 1:
The patent merges the control of buck, boost, and buck-boost modes into a single hysteretic control architecture. Instead of using separate patches for each mode transition, the solution combines all mode handling into one unified control loop that naturally manages transitions through the buck-boost boundary, eliminating the need for additional complexity while maintaining smooth regulation.
4Device complexity
If conventional control architectures are used near the buck-boost boundary, then simple control logic can be maintained, but regulation performance deteriorates
Solution Approach 1:
The hysteretic control architecture is self-adjusting near the buck-boost boundary, automatically adapting to changing operating conditions without requiring complex control logic. The natural comparison between output voltage and reference voltage, combined with the inherent properties of the buck-boost converter, enables the system to self-regulate through transition regions, maintaining simple logic while improving performance.
Data Source
AI summary
A hysteretic current mode buck-boost voltage regulator including a buck-boost voltage converter, a switching controller, a window circuit, a ramp circuit, and a timing circuit. The timing circuit may be additional ramp circuits. The voltage converter is toggled between first and second switching states during a boost mode, is toggled between third and fourth switching states during a buck mode, and is sequentially cycled through each switching state during a buck-boost mode. The ramp circuit develops a ramp voltage that simulates current through the voltage converter, and switching is determined using the ramp voltage compared with window voltages provided by the window circuit. The window voltages establish frequency, and may be adjusted based on the input and output voltages. The timing circuit provides timing indications during the buck-boost mode to ensure that the second and fourth switching states have approximately the same duration to provide symmetry of the ramp signal.