Hysteretic Current Control with Time-Domain Dithering

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Solution Overview

Problem

Hysteretic current control in switched-mode power supplies, particularly in envelope tracking DC-DC converters, faces challenges with direct current dithering due to difficulties in analog generation and practical power constraints, leading to limit cycles and spurs during periods of low activity.

Innovation Solution

Implementing time-domain dithering by randomly delaying the control signals that change the mode of the DC-DC converter, rather than modifying current limits, which achieves equivalent current-domain dithering effects without the need for analog signal injection or complex shaping.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If direct current dithering is implemented in hysteretic current control, then limit cycles and spurs are reduced, but analog signal generation complexity and power consumption increase

Engineering Contradiction:
Improvelimit cycle eliminationVSAvoidanalog signal generation
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces the mechanical/analog approach of direct current dithering with a digital/time-domain approach. Instead of modifying current limits analogously, the invention applies random time delays to control signals, achieving equivalent dithering effects through temporal domain manipulation rather than current domain modification. This substitution eliminates the need for complex analog signal generation circuits while maintaining the benefit of reducing limit cycles and spurs.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If direct current dithering is implemented in hysteretic current control, then limit cycles and spurs are reduced, but power consumption increases

Engineering Contradiction:
Improvelimit cycle eliminationVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent replaces the power-intensive analog current dithering mechanism with a low-power digital time-delay mechanism. By using random time delays applied to control signals rather than continuous analog current modulation, the system achieves the same limit cycle suppression with significantly reduced power consumption, as digital logic operations consume less power than analog signal generation and modulation circuits.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If time-domain dithering is applied by randomly delaying control signals, then system complexity is reduced, but control precision may be affected

Engineering Contradiction:
Improvecontrol signal processingVSAvoidcurrent control accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent applies partial dithering action by using small, randomized time delays rather than large or continuous delays. This partial action approach provides sufficient disruption to break limit cycles and spurs while maintaining the average control accuracy. The random delays are designed to be small enough that they do not significantly degrade control precision, achieving a balance between complexity reduction and performance maintenance.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentEP3068045B1Hysteretic current control with event dithering
Publication Date: 2019.08.14 INTEL IP CORP
  • EP3068045B1 patent drawingFigure 1
  • EP3068045B1 patent drawingFigure 2
  • EP3068045B1 patent drawingFigure 3A~3B

AI summary

Systems and methods implementing dithered hysteretic current control are discussed. One system can include a switched-mode power supply, a control component, and a dither component. The control component can detect a crossing of a first threshold associated with a first mode of the switched-mode power supply, and generate first and second control signals, wherein the first control signal is based on the crossing of the first threshold. The dither component can receive the first control signal, delay the first control signal for a first random time period, and output the first control signal to the switched-mode power supply. The switched-mode power supply can receive the first control signal and the second control signal, switch from the first mode to a second mode based on the first control signal, and switch from the second mode to the first mode based on the second control signal.