I2C Controller Self-Reset Mechanism for Bus Hang Recovery

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Solution Overview

Problem

Computing devices experience communication errors in I2C modules when operating as slaves, leading to bus hangs and degraded reliability due to the lack of a reset pin and dominant control over the system management bus, causing all master and slave devices to fail in error recovery.

Innovation Solution

Incorporating an I2C controller with a packet generator module that transmits packets to the I2C module, resetting the module when a packet receiving signal is not received within a set period, including resetting the state machine, register, and data structure, and applying a logic high or low value to a reset pin to recover from communication errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the computing device operates as a slave in I2C communication, then communication with external devices is enabled, but communication errors occur leading to bus hangs and degraded reliability

Engineering Contradiction:
Improvecommunication capabilityVSAvoidcommunication reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The slave device performs self-diagnosis by monitoring its own packet receiving signals. When a communication error is detected (packet receiving signal not received for set period), the slave device automatically resets itself without requiring external intervention, enabling self-recovery from bus hang states

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system implements feedback monitoring where the I2C controller continuously checks whether packet receiving signals are being transmitted by the I2C module. This feedback mechanism enables real-time detection of communication errors and triggers automatic reset operations to maintain reliable communication

Inventive Principle:
Principle #23Feedback

2Device complexity

If no reset pin is provided in the I2C module, then device complexity is reduced, but error recovery capability is lost causing bus hangs

Engineering Contradiction:
Improvemodule complexityVSAvoiderror recovery capability
Core Design Contradiction:
Device complexityVSEase of repair

Solution Approach 1:

The I2C module performs self-reset operations internally when communication errors are detected. The controller monitors packet receiving signals and automatically triggers reset sequences within the module without requiring external reset pins or manual intervention, maintaining simplicity while enabling error recovery

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The packet receiving signal acts as an intermediary indicator that mediates between the I2C module's communication state and the controller's error detection. By monitoring this signal, the system can detect errors and trigger reset operations without requiring direct access to internal module states or additional reset hardware

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10067906B2Computing device including an inter-integrated circuit (I2C) communication module and a communication error recovery method thereof
Publication Date: 2018.09.04 SAMSUNG ELECTRONICS CO LTD
  • US10067906B2 patent drawing
  • US10067906B2 patent drawing
  • US10067906B2 patent drawing

AI summary

A computing device includes an inter-integrated circuit (I2C) module configured to perform I2C communication with an external device through a system management bus, a packet generator module configured to transmit a packet to the I2C module through the system management bus, and an I2C controller configured to control operations of the I2C module and the packet generator module. When the I2C module transmits a packet receiving signal to the I2C controller and the I2C controller does not receive the packet receiving signal for a set period of time, the I2C controller may reset the I2C module.