I2C Slave IC Address Assignment via NACK Detection

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Solution Overview

Problem

Existing I2C bus systems face challenges in flexible address assignment for slave devices, often requiring additional circuits and software overhead, especially when multiple slaves share the same address, and existing solutions like I2C switches may not be sufficient.

Innovation Solution

An integrated circuit (IC) configured to operate as a slave on an I2C bus that receives and stores an address through the bus, using a not-acknowledge bit detection mechanism to identify itself uniquely, and includes a switching device to manage bus lead-throughs, allowing for flexible address assignment during initialization and preventing address conflicts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If I2C switches are used to split the bus into multiple sub-busses to avoid address conflicts, then address conflicts are reduced, but device complexity and software overhead increase

Engineering Contradiction:
Improveaddress conflict avoidanceVSAvoidadditional circuit and software overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The slave device automatically detects NACK conditions and self-configures its address register without requiring external switch control or complex software management. The device serves itself by monitoring bus acknowledgments and autonomously assigning addresses from a predefined set.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The system uses the NACK acknowledgment signal as feedback to determine whether address assignment is needed. When a slave receives a NACK, it indicates the address is not yet assigned, triggering the slave to select and store a new address from the available range.

Inventive Principle:
Principle #23Feedback

2Reliability

If I2C switches are deployed to manage multiple slaves with same address, then address conflicts are managed, but the solution becomes insufficient when many slaves share addresses

Engineering Contradiction:
Improveaddress conflict managementVSAvoidscalability to many slaves
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The invention changes the address space parameter by utilizing the NACK condition to enable slaves to select from an extended address range beyond the traditional 7-bit address limit, allowing up to 128 slaves (addresses 0x00-0x7F) to coexist without conflicts.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The address space is segmented into multiple available addresses (0x00-0x7F) that slaves can independently select from, dividing the single bus into logical address segments without requiring physical bus segmentation through switches.

Inventive Principle:
Principle #1Segmentation

3Ease of manufacture

If slaves are connected without bus lead-through capability, then simple connection is achieved, but slaves cannot physically open or close bus lines for address assignment

Engineering Contradiction:
Improvesimple connectionVSAvoidaddress assignment capability
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The slave device is designed with multi-functionality, serving both as an endpoint device and as a bus controller during initialization. The same I2C interface used for normal communication also enables the slave to monitor NACK conditions and control address assignment, eliminating the need for separate control functionality.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8543740B2Apparatus and method for increased address range of an I2C or I2C compatible bus
Publication Date: 2013.09.24 TEXAS INSTRUMENTS INC
  • US8543740B2 patent drawing
  • US8543740B2 patent drawing
  • US8543740B2 patent drawing

AI summary

An integrated circuit (IC) configured to operate as a slave on an inter-integrated circuit (I2C) or I2C compatible bus. The IC is further configured to receive an address through the I2C bus and store the received address in a register, so as to be identified by the address. A method of address assignment in a master/slave system, the system comprises at least one master, a plurality of slaves, and an I2C or I2C compatible bus. The method comprises sending a first address by the master on the I2C bus to a first of the plurality of slaves and storing the first address on the first slave to identify the first slave by the first address. The method further comprises sending a second address by the master on the I2C bus to a second of the plurality of slaves and storing the second address on the second slave to identify the second slave by the second address. The steps of sending and storing are repeated until all slaves of the system have stored an address.