Programmable I2C Comparator Thresholds for Multi-Voltage Noise Rejection

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Solution Overview

Problem

Existing I2C interface circuits face challenges in achieving compatibility with multiple pull-up voltage levels while maintaining sufficient hysteresis, leading to issues with electronic noise interference, particularly in switching converters like class-D power amplifiers.

Innovation Solution

An I2C interface circuit with programmable comparator stages that can switch between operating modes, allowing compatibility with different pull-up voltages (1.8 V and 3.3 V) without the need for additional pins, by setting thresholds dynamically based on received programming frames.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the hysteresis is increased to reject noise, then the noise rejection capability is improved, but the compatibility with multiple pull-up voltage levels deteriorates

Engineering Contradiction:
Improvenoise rejection capabilityVSAvoidcompatibility with multiple pull-up voltage levels
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic threshold adjustment by detecting the actual pull-up voltage level and automatically configuring the comparator thresholds accordingly. The system switches between different threshold pairs: a first pair (0.3×Vpu, 0.7×Vpu) for high pull-up voltage to ensure sufficient hysteresis, and a second pair (0.2×Vpu, 0.8×Vpu) for low pull-up voltage to maintain compatibility. This dynamic adaptation resolves the contradiction by making the hysteresis characteristics variable rather than fixed.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of the input comparators based on the detected pull-up voltage level. By monitoring the voltage level and adjusting the threshold parameters dynamically, the system achieves both high noise rejection (when using larger hysteresis at high voltage) and broad voltage compatibility (when using smaller hysteresis at low voltage). This parameter adaptation allows the same hardware to satisfy both contradictory requirements under different operating conditions.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If an external pull-up voltage pin is added to achieve wider hysteresis range, then the adaptability to multiple voltage levels is improved, but the device complexity and pin count increase

Engineering Contradiction:
Improvevoltage level compatibilityVSAvoidpin count and PCB trace requirements
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent enables the I2C interface circuit to automatically detect the pull-up voltage level and configure its own comparator thresholds without external intervention. The system uses its existing resources (I2C interface, comparator stages) to perform self-diagnosis and self-adjustment, eliminating the need for additional dedicated pins or external components. This self-service approach resolves the contradiction by achieving adaptability through intelligent software control rather than hardware expansion.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent makes the existing I2C interface pins multi-functional: they serve both as communication interfaces and as voltage level detection channels. By detecting the pull-up voltage through the existing data and clock lines during communication, the system achieves voltage level adaptation without requiring dedicated detection pins. This universal use of existing components resolves the contradiction by achieving adaptability without increasing pin count or device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250226819A1I2c interface circuit, corresponding electronic device and method of operation
Publication Date: 2025.07.10 STMICROELECTRONICS SRL
  • US20250226819A1 patent drawing
  • US20250226819A1 patent drawing

AI summary

A first comparator stage of an I2C interface circuit compares a received clock signal to low and high thresholds to produce a clock signal. A second comparator stage of the I2C interface circuit compares a received data signal to the low and high thresholds to produce a data signal. The first and second comparator stages are programmed by default in a first operating mode where the low threshold is a first fractional value of the high pull-up voltage and the high threshold is a second fractional value of the low pull-up voltage. The first and second comparator stages are switchable, in response to a received programming frame identifying a current pull-up voltage value, to a second operating mode where the low threshold is the first fractional value of the current pull-up voltage value and the high threshold is the second fractional value of the current pull-up voltage value.