I2C Address Modification Using UUID Comparison Logic

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Solution Overview

Problem

The existing I2C protocol requires a configuration pin for each target device to alter its address, increasing the number of pins needed and causing data corruption when multiple devices share the same address on a single I2C bus.

Innovation Solution

A method that modifies device addresses by using logical AND operations on UUIDs and inverse UUIDs transmitted over the I2C bus, allowing target devices to determine and set individual addresses without additional configuration pins, using a primary device to send specific commands that enable target devices to calculate and set unique addresses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a configuration pin is used for each target device to alter its address, then the device address can be modified, but the number of pins required on the target device increases

Engineering Contradiction:
Improvedevice address modification capabilityVSAvoidnumber of pins
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts the address modification functionality from the physical pin configuration approach and implements it through software-based UUID comparison and address calculation. The configuration pin is completely removed, and address modification is achieved through receiving a first address, determining a second address based on UUID comparison, and setting the determined address in a register.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical pin-based configuration system with an electronic/software-based system. Instead of using physical pins to select addresses, the system uses UUID comparison logic and register-based address setting, substituting mechanical configuration with electronic data processing.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Device complexity

If multiple target devices share the same address on a single I2C bus, then the number of pins is reduced, but data corruption occurs

Engineering Contradiction:
Improvenumber of pinsVSAvoiddata integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent performs preliminary UUID comparison and address determination before actual I2C communication occurs. The system determines a unique second address for each device by comparing UUIDs in advance, ensuring that each device has a unique address before data transmission begins, thus preventing data corruption.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where devices compare their UUIDs with received UUIDs, determine their unique address based on this comparison, and set their address accordingly. This feedback loop ensures that each device independently determines its unique address, preventing address conflicts and data corruption on the bus.

Inventive Principle:
Principle #23Feedback

3Adaptability or versatility

If additional configuration pins are added to each target device, then address modification is enabled, but the device pin count and overall system complexity increase

Engineering Contradiction:
Improveaddress configuration flexibilityVSAvoidpin count
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements self-service address configuration where each target device automatically determines its own unique address by comparing its UUID with received UUIDs and calculating its second address independently. This eliminates the need for external configuration pins or manual address setting, as each device configures itself autonomously.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250021508A1Methods and apparatus to preform inter-integrated circuit address modification
Publication Date: 2025.01.16 TEXAS INSTRUMENTS INC
  • US20250021508A1 patent drawing
  • US20250021508A1 patent drawing
  • US20250021508A1 patent drawing

AI summary

A system includes a device including a first register configured to store a first address, a second register configured to store a first device identifier, a third register configured to store a value, the value adapted to be a logical AND of the first device identifier and a second device identifier and a circuit coupled to the first register, the second register, and the third register. The circuit is configured to determine the second device identifier based on the first device identifier of the second register and the value of the third register, responsive to determining the second device identifier, the first circuit compares the first device identifier to the second device identifier, after comparing the first device identifier to the second device identifier, the first circuit determines a second address and after determining the second address, the first circuit sets the first register to store the second address.