I2C Wake-Up Circuit With SDA Hold for Low-Power Communication
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Solution Overview
Problem
Existing I2C communication systems face challenges in reducing power consumption while maintaining normal communication during low power mode, as turning off the clock source introduces signal synchronization overhead and complex address matching mechanisms when using SCL as a clock or data line.
Innovation Solution
An I2C wake-up circuit that detects a start signal to send a clock wake-up signal and holds the SDA line until the clock signal is received, preventing data loss and ensuring normal communication by using a simple hardware circuit to manage clock wake-up and access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the clock source is turned off in low power mode, then power consumption is reduced, but signal synchronization overhead increases and communication reliability deteriorates
Solution Approach 1:
The slave device detects the start signal in advance and sends a clock wake-up signal to the master device before the actual data transmission begins. This preliminary action allows the master device to prepare its clock circuitry ahead of time, ensuring that the clock is ready when data transmission starts, thus maintaining communication reliability while allowing the slave to remain in low power mode
Solution Approach 2:
A clock wake-up signal is introduced as an intermediary between the start signal and the actual I2C data transmission. This intermediary signal enables the master device to wake up its clock circuitry in a controlled manner, bridging the gap between the slave's low power state and the need for reliable clocked communication during data transfer
2Use of energy by moving object
If SCL is used as a clock, then power consumption is reduced, but signal synchronization overhead increases
Solution Approach 1:
The master device performs clock domain synchronization in advance by detecting the clock wake-up signal and preparing its clock circuitry before actual data transmission. This preliminary synchronization action eliminates the need for continuous synchronization overhead during data transfer, reducing time loss while maintaining low power consumption
3Use of energy by moving object
If SCL is used as a data line, then power consumption is reduced, but device complexity increases due to complex address matching and clock wake-up mechanisms
Solution Approach 1:
The patent extracts the clock wake-up function from the data transmission process by using a separate clock wake-up signal mechanism. This separation simplifies the overall system by allowing the slave device to remain in a simple low power state while the master device handles the clock wake-up coordination, reducing the complexity of address matching and wake-up mechanisms on the slave side
Data Source
AI summary
An I2C wake-up circuit, method and electronic device are disclosed. The I2C wake-up circuit includes: a clock wake-up circuit, configured to send a clock wake-up signal to a clock circuit in response to detecting a start signal on a serial clock line SCL and a serial data line SDA; and a signal hold circuit, configured to hold the serial data line SDA in a state of not transmitting address information until a clock signal sent by the clock circuit that is wake-up is received. The present I2C wake-up solution can realize normal data reception through a simple hardware circuit without a specific address wake-up and maximize power saving by turning on the clock when there is access and turning off the clock when the access ends.