I2S Audio Clock Synchronization Across SerDes Links
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Solution Overview
Problem
Existing high-speed serial communication protocols, such as FPD-LINK, fail to correctly transmit and regenerate asynchronous audio signals conforming to the I2S protocol due to differences in sampling clock frequencies between audio sources, leading to potential audio quality deterioration.
Innovation Solution
A communication device and system that measure and synchronize audio master clocks with reference clocks, generating packets containing frequency division ratios and timing information to accurately transmit and regenerate I2S signals across SerDes interfaces, ensuring correct audio signal regeneration despite asynchronous sampling clock frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If audio signals are transmitted using I2S protocol between SerDes devices, then audio data can be transmitted, but the asynchronous sampling clock frequencies cause incorrect audio signal regeneration
Solution Approach 1:
The transmission side performs preliminary measurement of the number of reference clocks contained in one cycle of the frequency-divided audio master clock before transmission. This measurement value is embedded in the transmitted packet, enabling the reception side to regenerate the audio master clock accurately without requiring asynchronous frequency compatibility.
Solution Approach 2:
The patent introduces an intermediary measurement value (number of reference clocks per audio master clock cycle) that mediates between the asynchronous sampling clock frequencies of transmission and reception sides. This intermediary parameter enables synchronization without requiring the clocks to be inherently compatible.
2Adaptability or versatility
If the sampling clock frequency varies depending on the audio source, then different audio sources can be connected, but existing protocols cannot correctly transmit and regenerate the audio signals
Solution Approach 1:
The system performs preliminary measurement and embedding of clock frequency relationship information (number of reference clocks per audio master clock cycle) before transmission. This allows the reception side to adapt to any audio source frequency while maintaining accurate signal regeneration.
Solution Approach 2:
The patent changes the parameter being transmitted from fixed-frequency assumptions to dynamic measurement-based parameters. By transmitting the measured number of reference clocks per cycle, the system adapts to varying sampling clock frequencies while maintaining transmission accuracy.
3Speed
If high-speed serial communication is used between SerDes devices, then transmission speed is improved, but asynchronous audio signal synchronization is lost
Solution Approach 1:
The measurement of the reference clock cycle relationship is performed in advance on the transmission side, allowing high-speed transmission without real-time synchronization negotiation. The pre-measured value ensures synchronization accuracy is maintained despite the high-speed asynchronous transmission medium.
Data Source
AI summary
Communication devices and systems with correct regeneration of an audio signal are disclosed. In one example, a communication device measures a number of predetermined reference clocks included in one cycle of a frequency divided signal, on the basis of an audio master clock having a frequency obtained by multiplying a frequency of a sampling clock to sample an audio signal, a frequency division ratio of a frequency divided signal of the audio master clock, and a predetermined reference clock. A packet generator generates a packet including information including the measured number, a bit width of serial data (SD) conforming to an Inter-IC Sound (I2S) standard, the frequency of the sampling clock, a frequency division ratio of the frequency divided signal to the audio master clock, a frequency ratio of the frequency of the audio master clock to the frequency of the sampling clock, and the SD.