I3C Dynamic Address Allocation Using Shared I/O Pins
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Solution Overview
Problem
The conventional method of allocating device instance IDs in the I3C communication protocol requires four dedicated pins per device instance, increasing the size and manufacturing cost of printed circuit boards (PCBs) due to the need for unique identification of each device instance.
Innovation Solution
A system where a first device instance receives a status signal and a clock signal from an I3C controller device, decodes commands, and generates responses to allocate dynamic addresses, allowing subsequent device instances to receive status signals indicative of their IDs, thereby reducing the need for dedicated pins by using two I/O pins for ID allocation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If four dedicated pins are reserved on each device instance for device instance ID allocation, then unique device instance identification is achieved, but the size and manufacturing cost of each device instance and the PCB increase
Solution Approach 1:
The patent applies multi-functionality by enabling two I/O pins to serve dual purposes: general-purpose input/output operations and device instance ID allocation. During initialization, these pins are configured to receive status signals for ID allocation, and during normal operation, they function as standard I/O pins, thereby eliminating the need for four dedicated pins while maintaining unique device instance identification
Solution Approach 2:
The patent merges the function of dedicated ID allocation pins with general-purpose I/O pins. By combining these functions into existing I/O infrastructure, the system reduces pin count without compromising the ability to uniquely identify device instances through status signal exchange during initialization
2Ease of manufacture
If four dedicated pins are reserved on each device instance, then device instance ID allocation is facilitated, but the manufacturing cost of the PCB increases
Solution Approach 1:
The patent reduces PCB manufacturing cost by making existing I/O pins multi-functional. These pins handle both general I/O operations and device instance ID allocation during initialization, eliminating the need for additional dedicated pins and thereby reducing PCB complexity and manufacturing expenses
3Ease of manufacture
If four dedicated pins are reserved on each device instance, then device instance ID allocation is enabled, but the size of each device instance increases
Solution Approach 1:
The patent reduces the physical size of each device instance by configuring existing I/O pins to serve dual purposes. During initialization, these pins receive status signals for ID allocation; during normal operation, they perform standard I/O functions. This eliminates the need for four dedicated pins per device instance, thereby reducing device instance footprint
Data Source
AI summary
Dynamic address allocation of multiple device instances of an improved inter-integrated circuit (I3C) target device by an I3C controller device is disclosed. A first device instance is configured to receive a command and a clock signal from the I3C controller device, and further receive a first status signal that is indicative of a first device instance ID of the first device instance. The first device instance is further configured to decode the command based on the first status signal and the clock signal, and generate a response that includes the first device instance ID. The I3C controller device is configured to allocate a dynamic address to the first device instance based on the response. The first device instance is then configured to generate and provide a second status signal to a second device instance for facilitating dynamic address allocation of the second device instance.