I3C Clock Stretching Emulation via In-Band Interrupts

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Solution Overview

Problem

The MIPI I3C specification lacks a mechanism for clock stretching, which is a feature available in I2C systems, preventing I3C and I2C target devices from utilizing this capability on the I3C bus, and I2C devices from interoperating effectively in mixed I2C/I3C systems.

Innovation Solution

A software-driven clock stretching mechanism is implemented using in-band interrupts to emulate clock stretching for both I3C and I2C target devices on the I3C bus, allowing I3C devices to request and manage clock stretching through specific data patterns and I2C devices to signal their needs via predefined data patterns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If clock stretching is implemented in I3C bus, then data transmission adaptability is improved, but protocol complexity increases

Engineering Contradiction:
Improvedata transmission adaptabilityVSAvoidprotocol complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces an intermediary mechanism using in-band interrupts as a mediator between the controller and target device. The controller sets a stretching flag through the interrupt mechanism, and the target device responds by generating a stretching response interrupt. This intermediary approach enables clock stretching functionality without requiring direct physical clock line manipulation, thus adding adaptability while managing protocol complexity through software-based coordination.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If clock stretching mechanism is added to I3C, then interoperability with I2C devices is improved, but device complexity increases

Engineering Contradiction:
ImproveinteroperabilityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements universality by enabling the same I3C bus to support both native I3C devices and legacy I2C devices with clock stretching capability. The controller can identify target device types and appropriately handle clock stretching requests through the in-band interrupt mechanism. This multi-functional approach allows I3C bus to maintain backward compatibility with I2C devices while providing forward compatibility with I3C devices, thereby improving interoperability without requiring separate physical interfaces.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If in-band interrupt mechanism is used for clock stretching, then implementation simplicity is improved, but communication overhead increases

Engineering Contradiction:
Improveimplementation simplicityVSAvoidcommunication overhead
Core Design Contradiction:
Ease of manufactureVSLoss of information

Solution Approach 1:

The patent applies partial action by using in-band interrupts only for the specific purpose of clock stretching coordination, rather than implementing a complete interrupt system for all communications. The stretching flag and stretching response interrupt are selectively activated only when clock stretching is needed, minimizing communication overhead. This partial approach maintains implementation simplicity by leveraging existing interrupt infrastructure while avoiding the need for additional dedicated hardware circuits.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20250355830A1Mechanism for Emulating Clock Stretching
Publication Date: 2025.11.20 INTEL CORP
  • US20250355830A1 patent drawing
  • US20250355830A1 patent drawing
  • US20250355830A1 patent drawing

AI summary

Examples relate to apparatuses, devices, methods, computer programs and non-transitory computer-readable media for emulating clock stretching. A controller apparatus is configured to communicate with a target apparatus via a bus, and to emulate clock stretching based on requests to start and end clock stretching obtained via an in-band interrupt mechanism. The controller apparatus is configured to pause data or command transmissions to the target apparatus during the emulated clock stretching, and to resume the data or command transmissions to the target apparatus after the emulated clock stretching has ended.