I3C Host Controller Auto Command Feature for Interrupt Latency

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing I3C host controller lacks the ability to handle time-critical actions, particularly when target devices require quick data reads from their transmit buffers, due to the lack of priority given to read commands in the existing I3C protocol, leading to delayed handling and increased latency.

Innovation Solution

An enriched auto command feature for the I3C host controller that provides a hardware-based autonomous in-band interrupt response, utilizing a multiplexer/demultiplexer circuit and controller circuit to pre-programmed commands, allowing for immediate handling of time-sensitive data reads and reducing processor involvement in IBI screening.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the host device uses software/firmware to handle in-band interrupts, then flexibility in deciding actions is improved, but response time for time-critical actions deteriorates

Engineering Contradiction:
Improveflexibility in deciding actionsVSAvoidresponse time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent pre-programs multiple commands in a table at the host device before receiving in-band interrupts. When an IBI is received, the host device automatically executes the pre-programmed command corresponding to the interrupt type without software intervention, achieving both speed and flexibility.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary command table that maps interrupt types to pre-programmed commands. This intermediary structure enables automatic hardware-based response while maintaining the flexibility of programmed command selection, bridging the gap between fast hardware response and flexible software control.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If read commands are queued on top of pipelined commands, then command processing throughput is improved, but priority handling of time-critical read commands deteriorates

Engineering Contradiction:
Improvecommand processing throughputVSAvoidpriority handling
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent pre-programs specific read commands in the command table for different interrupt types. When a time-critical IBI is received, the corresponding pre-programmed read command is executed immediately with highest priority, bypassing the normal queuing mechanism while maintaining overall command processing efficiency.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If the host device executes commands sequentially through software, then command accuracy is improved, but processing speed deteriorates

Engineering Contradiction:
Improvecommand accuracyVSAvoidprocessing speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent replaces the mechanical software execution process with an automated hardware-based command execution system. The controller circuit automatically retrieves and executes pre-programmed commands from the command table based on received IBIs, eliminating software intervention delays while maintaining command accuracy through pre-programmed instruction precision.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The host device performs self-service by automatically executing pre-programmed commands in response to IBIs without requiring software/firmware intervention. The controller circuit autonomously handles command selection and execution based on the interrupt type, achieving both speed and accuracy.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11853236B2Enriched auto command feature for I3C host controller
Publication Date: 2023.12.26 SYNOPSYS INC
  • US11853236B2 patent drawing
  • US11853236B2 patent drawing
  • US11853236B2 patent drawing

AI summary

A device includes a memory, a plurality of registers, a multiplexer/demultiplexer circuit, and a controller circuit. The memory stores a plurality of pages of pointers and a table of commands. The plurality of registers store information about a plurality of target devices. The multiplexer/demultiplexer circuit selects (i) information from a register of the plurality of registers based on a request received from a target device of the plurality of target devices, (ii) a page from the plurality of pages based on the selected information, and (iii) a pointer from the selected page based on the selected information. The controller circuit executes a command from the table of commands based on the selected pointer.