I3C Multiplexor Routing In-Band Interrupts to Correct Masters
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Solution Overview
Problem
Information handling systems face performance degradation due to flooding of in-band interrupts (IBIs) across I3C master interfaces, leading to missed critical interrupts and potential damage, as existing systems lack efficient mechanisms to route IBIs to the correct master interfaces.
Innovation Solution
A multiplexor system with a switch, routing map, and interrupt detector is implemented to selectively couple I3C slave interfaces to I3C master interfaces based on IBI addresses, ensuring that IBIs are directed to the appropriate master interface, thereby preventing performance degradation and ensuring accurate interrupt handling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple I3C master interfaces are used to handle more devices, then the system capacity and device support are improved, but interrupt flooding occurs causing performance degradation and missed critical interrupts
Solution Approach 1:
The patent introduces a multiplexor as an intermediary device between I3C slave interfaces and multiple I3C master interfaces. The multiplexor includes a switch, routing map, and interrupt detector that work together to selectively couple slaves to masters based on interrupt address matching, preventing interrupt flooding by directing interrupts only to the appropriate master interface.
2Reliability
If all I3C slave interfaces are coupled to all I3C master interfaces, then comprehensive interrupt coverage is achieved, but system complexity and interrupt processing overhead increase significantly
Solution Approach 1:
The patent segments the interrupt handling function by dividing the system into I3C slave interfaces, a multiplexor with routing map, and multiple I3C master interfaces. Each component has a specific role: slaves generate interrupts, the multiplexor routes them based on address matching, and masters process them. This segmentation reduces complexity compared to a fully connected architecture.
Solution Approach 2:
The patent implements dynamic routing where the multiplexor selectively couples slave interfaces to master interfaces based on real-time interrupt address matching. The switch within the multiplexor dynamically changes connections rather than maintaining fixed or all-to-all connections, reducing system complexity while ensuring proper interrupt coverage.
3Device complexity
If interrupt routing is handled without a multiplexor, then device complexity is reduced, but interrupt misrouting occurs causing performance degradation and potential damage
Solution Approach 1:
The multiplexor serves as a protective intermediary that prevents harmful interrupt misrouting before it can affect system performance. The interrupt detector and routing map ensure that interrupts are correctly matched to their intended master interfaces, blocking misrouting at the source rather than attempting to correct it downstream.
Data Source
AI summary
A multiplexor for an I3C) network includes a switch, a routing map, and an interrupt detector. The switch selectably couples I3C slave interfaces to I3C master interfaces. The routing map includes map entries associating each I3C slave interface with an I3C master interfaces based upon an I3C address of the I3C slave interface, such that, for each map entry, an IBI received from the associated I3C slave interface is mapped to the associated I3C master interface. The interrupt detector detects an IBI from an I3C slave interface, determines that a map entry associated with the I3C slave interface maps the I3C slave interface with a particular I3C master interface based upon the IBI, and directs the switch to couple the I3C slave interface to the I3C master interface based upon the map entry.