IBC Solar Cell Transport Layers for Better Electrode Contact
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Solution Overview
Problem
The poor electrical contact quality between the electrode and semiconductor regions in interdigital back contact (IBC) solar cells limits the photoelectric conversion efficiency of these cells.
Innovation Solution
A solar cell structure is developed with a semiconductor substrate having a hole transport layer and an electronic transport layer, both made of specific oxides, and covered by passivation layers, which are formed using atomic layer deposition or plasma enhanced chemical vapor deposition to enhance contact quality and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional diffusion method with staggered N-type and P-type doped semiconductor regions is used, then the IBC solar cell structure can be formed without front grid lines, but the electrical contact quality between electrode and semiconductor region is poor
Solution Approach 1:
The patent introduces an amorphous silicon interlayer between the semiconductor region and the electrode as an intermediary. This interlayer serves as a mediator that improves the electrical contact quality by providing better interface compatibility and carrier transport properties, directly resolving the poor electrical contact issue in traditional IBC solar cells
Solution Approach 2:
The patent employs a composite structure combining crystalline silicon semiconductor regions with amorphous silicon interlayer. This composite material approach leverages the advantages of both materials: the crystalline silicon provides photoelectric conversion while the amorphous silicon interlayer enhances electrical contact and interface properties
2Reliability
If thermal SiO2 or a-Si:H interlayers are used in IBC solar cells, then electrical contact can be improved, but the manufacturing process complexity and thermal budget increase
Solution Approach 1:
The patent optimizes the deposition parameters of the amorphous silicon interlayer, including thickness control and deposition conditions, to achieve good electrical contact without requiring additional complex processing steps or high thermal budgets, thus improving contact quality while maintaining process simplicity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The improved contact quality between electrodes and semiconductor regions enhances the photoelectric conversion efficiency and yield of IBC solar cells.
Implementation Method 1
a material of the hole transport layer includes a vanadium oxide, a material of the electronic transport layer includes a titanium oxide
Implementation Method 2
The first passivation layer is located on a surface of the hole transport layer away from the semiconductor substrate. A surface of the first passivation layer away from the semiconductor substrate, a surface of the electronic transport layer away from the semiconductor substrate, and the first surface of the semiconductor substrate are all covered by the second passivation layer
Data Source
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AI summary
A solar cell and a method for preparation the solar cell are provided. The solar cell includes a semiconductor substrate (10), a hole transport layer (21) and an electronic transport layer (40), a first passivation layer (22) and a second passivation layer (50). The semiconductor substrate (10) includes a first surface and a second surface opposite to each other. The hole transport layer (21) and the electronic transport layer (40) are disposed on the first surface of the semiconductor substrate (10) at interval. A material of the hole transport layer (21) includes vanadium oxide, and a material of the electronic transport layer (40) includes titanium oxide. The first passivation layer (22) is located on a surface of the hole transport layer (21) away from the semiconductor substrate (10). A surface of the first passivation layer (22) away from the semiconductor substrate (10), a surface of the electronic transport layer (40) away from the semiconductor substrate (10), and the first surface of the semiconductor substrate (10) are all covered by the second passivation layer (50).