Integrated Circuit Active Region Fabrication via Void Oxidation
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Solution Overview
Problem
Conventional methods for fabricating integrated circuits result in the formation of sharp corners in active material underlying gate oxide layers in medium and high voltage device areas, which negatively impact device performance.
Innovation Solution
The method involves selectively forming voids between isolation and active regions in high voltage device areas to expose side surfaces, followed by oxidation to form a gate oxide layer, thereby defining convex interfaces and preventing sharp corner formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If dual gate oxidation process is used to form gate oxide in medium and high voltage device areas, then gate oxide formation is achieved, but sharp corners form in the underlying active material
Solution Approach 1:
The method performs preliminary actions by forming voids in the isolation regions and depositing mandrel material before gate oxide formation. This preliminary structuring prevents the oxidation-induced corner formation by creating a physical barrier (mandrel) that controls the oxidation front, thereby achieving both gate oxide formation and preventing sharp corner formation in the active regions.
Solution Approach 2:
The mandrel material acts as an intermediary element between the isolation regions and the active regions. It serves as a protective barrier during the gate oxidation process, preventing the formation of sharp corners in the active material while allowing the gate oxide to form properly. The mandrel is later removed, having fulfilled its protective function.
2Adaptability or versatility
If different gate oxide processing is applied to different voltage device areas, then devices with different gate oxide thicknesses are formed, but physical and electrical effects vary across device areas
Solution Approach 1:
The method applies local quality by forming voids and mandrels specifically in the isolation regions of medium and high voltage device areas, while leaving low voltage device areas unchanged. This localized modification allows different gate oxide processing in different areas while maintaining consistency in active region formation, thereby achieving both gate oxide thickness variation and device performance consistency.
3Manufacturing precision
If voids are formed between isolation and active regions, then side surfaces are exposed for oxidation, but process complexity increases
Solution Approach 1:
The method segments the isolation regions by forming voids within them, separating the isolation function from the active region interface. This segmentation allows the voids to serve as spaces for mandrel deposition, which in turn controls the oxidation process. While this adds process steps, it systematically addresses the interface formation issue through divided functional zones.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures the formation of well-formed active regions in both low, medium, and high voltage device areas, improving device performance by eliminating sharp corners and enhancing gate dielectric layer formation.
Implementation Method 1
oxidizing the upper surface and the active side surfaces to form a gate oxide layer over the low voltage device area and the high voltage device area
Data Source
AI summary
Methods for fabricating integrated circuits having improved active regions are provided. In an embodiment, a method for fabricating an integrated circuit includes providing a semiconductor substrate having an upper surface and including active regions and isolation regions formed in a low voltage device area and in a high voltage device area. The method includes selectively forming voids between the isolation regions and the active regions in the high voltage device area to expose active side surfaces. The method further includes oxidizing the upper surface and the active side surfaces to form a gate oxide layer over the low voltage device area and the high voltage device area.