3D IC Air Gap Formation via Sacrificial Material Etching
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Solution Overview
Problem
Existing methods for forming air gaps between interconnection lines in integrated circuits weaken the mechanical strength of the intermediate interconnection layer, leading to potential short circuits and degradation of the integrated circuit during heating steps, especially when forming a second active layer in 3D integration.
Innovation Solution
A method involving the formation of a superpositioning of an insulator layer and interconnection lines on a lower metallic level separated by a sacrificial filling, with access creation and filling to form air gaps, ensuring mechanical strength and reducing parasitic capacitances, while allowing the integrated circuit to withstand heating steps and mechanical stresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If air gaps are formed between interconnection lines to reduce parasitic capacitance, then the capacitance between lines is reduced, but the mechanical strength of the interconnection layer is weakened
Solution Approach 1:
The interconnection layer is segmented into multiple levels (first, second, and third metallic levels) with support structures providing mechanical reinforcement. The air gaps are localized between specific lines rather than uniformly distributed, allowing capacitance reduction in critical areas while maintaining structural integrity through strategically placed support elements.
Solution Approach 2:
Support structures act as intermediary elements between the air-gapped interconnection lines and the substrate. These support structures provide mechanical strength to the interconnection layer while allowing air gaps to form between the interconnection lines, thus mediating between the conflicting requirements of mechanical strength and capacitance reduction.
2Reliability
If air gaps are formed between interconnection lines, then the coefficient of permittivity is reduced and capacitance decreases, but the interconnection layer becomes vulnerable to bending and short circuits
Solution Approach 1:
The interconnection system is divided into multiple metallic levels with support structures providing mechanical reinforcement at each level. Air gaps are selectively formed between specific lines rather than uniformly distributed, allowing electrical insulation in critical areas while maintaining structural integrity through strategically placed support elements.
Solution Approach 2:
Support structures serve as intermediary elements that provide mechanical reinforcement to the air-gapped interconnection layer. These supports prevent excessive bending and short circuits while allowing air gaps to maintain electrical insulation between interconnection lines.
3Ease of manufacture
If heating steps are performed during fabrication, then material processing is enabled, but trapped gas in air gaps creates excess pressure causing degradation or wafer dislocation
Solution Approach 1:
Venting structures are formed in advance during the fabrication process, before heating steps that would generate gas pressure. These pre-formed venting pathways allow trapped gas to escape during subsequent heating operations, preventing pressure buildup that could cause degradation or wafer dislocation.
Solution Approach 2:
Venting structures act as intermediary pathways that facilitate the escape of trapped gas during heating steps. These structures mediate between the heating process (which generates gas pressure) and the integrated circuit (which would be damaged by excessive pressure), allowing controlled gas release to maintain circuit integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach maintains the mechanical strength of the interconnection layer, reduces parasitic capacitances, and prevents degradation of the integrated circuit during heating, enabling successful 3D integration with improved reliability and performance.
Implementation Method 1
This sacrificial layer is formed in a thermal sacrificial material which evaporates when heated to a sufficient temperature. The interconnection layer is covered by a porous diffusion layer. After a heating step, the sacrificial layer is evaporated. The gas generated by the evaporation is evacuated via the diffusion layer.
Implementation Method 2
The interconnection layer is covered by a porous diffusion layer. After a heating step, the sacrificial layer is evaporated. The gas generated by the evaporation is evacuated via the diffusion layer.
Data Source
AI summary
A method of fabrication of an integrated circuit is provided, including: providing a substrate including a first active layer and a first metallic level of interconnection arranged on top of the active layer and including first lines of interconnection separated by a first filling of sacrificial material; forming a superposition of an insulator layer and second lines of interconnection; providing access to the first filling through the insulator layer; filling the provided access with a second filling of sacrificial material; forming a second active layer on top of the second metallic level of interconnection; providing access to the second filling through the second active layer; and removing the first and the second fillings by a chemical etching through the provided access to the second filling.