IC Air Gap Formation via Segmented Spacer Design
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Solution Overview
Problem
The integration of air gaps between transistor terminals is challenging due to design rule spacing constraints and the difficulty in incorporating desirable materials like air gaps into existing processes, which affects device performance and reliability, especially in high-density circuit designs.
Innovation Solution
A method involving the formation of spacers with different material compositions on semiconductor fins, followed by the reduction of the height of one spacer and the creation of an air gap between the gate structure and the second spacer using a gate cap, allowing for horizontal and vertical air gap formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If air gaps are incorporated into transistor structures to reduce effective capacitance, then AC device performance is improved, but manufacturing complexity and process difficulty increase due to design rule spacing constraints
Solution Approach 1:
The spacer structure is divided into two distinct segments: a first spacer formed directly on the semiconductor fin, and a second spacer formed on the first spacer. This segmentation allows independent material selection and height control for each spacer, enabling the creation of air gaps while maintaining compliance with design rule spacing constraints.
Solution Approach 2:
The invention transitions from traditional planar air gap formation to a multi-dimensional approach by forming spacers in vertical layers. The first spacer provides a foundation, while the second spacer extends vertically to create the air gap region, utilizing vertical dimensionality to achieve capacitance reduction without violating horizontal spacing design rules.
2Reliability
If air gaps are formed between gate and source/drain regions to reduce capacitance, then device performance in AC applications is enhanced, but the ability to form functional elements is limited by design rule spacing constraints
Solution Approach 1:
By segmenting the spacer structure into first and second spacers with different material compositions, the invention creates distinct functional zones. The first spacer material can be optimized for adhesion and structural support, while the second spacer material can be optimized for creating the desired air gap, thereby maintaining adaptability in forming functional elements.
Solution Approach 2:
Different regions of the spacer structure are assigned different material qualities: the first spacer uses a material optimized for interface adhesion with the fin, while the second spacer uses a material that facilitates air gap formation. This local differentiation allows the structure to simultaneously satisfy design rule constraints and achieve capacitance reduction.
3Reliability
If spacer height is reduced to accommodate air gap formation, then effective capacitance is decreased, but structural integrity must be maintained
Solution Approach 1:
The segmented spacer structure allows the first spacer to maintain structural integrity and provide a stable foundation, while the second spacer can be optimized for height reduction to create the air gap. Each segment performs its specific function, balancing structural requirements with capacitance reduction goals.
Solution Approach 2:
The dual-material spacer structure combines materials with complementary properties: the first spacer material provides structural strength and adhesion, while the second spacer material enables effective height reduction for air gap formation. This composite approach maintains overall structural integrity while achieving the desired capacitance reduction.
Data Source
AI summary
The disclosure provides an integrated circuit (IC) structure including a first spacer on a semiconductor fin adjacent a first portion of the gate structure, and having a first height above the semiconductor fin; a second spacer on the semiconductor fin adjacent the first spacer, such that the first spacer is horizontally between the first portion of the gate structure and a lower portion of the outer; and a gate cap positioned over the first portion of the gate structure and on the second spacer above the semiconductor fin. The gate cap defines an air gap horizontally between the first portion of the gate structure and an upper portion of the second spacer, and vertically between an upper surface of the first spacer and a lower surface of the gate cap.