Integrated Circuit Backside Routing for Low-Resistance Signal Paths
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Solution Overview
Problem
As semiconductor integrated circuits scale down, the resistivity of signal paths increases, leading to performance issues due to the scaling of metal routing dimensions, which affects long-distance signal transmission efficiency.
Innovation Solution
The use of wider metal lines on the backside of the integrated circuit for signal transmission between logic circuits, reducing resistivity and improving performance by utilizing both front and backside metal routing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If metal routing dimensions are scaled down to match semiconductor scaling, then device density and integration are improved, but signal path resistivity increases and long-distance signal transmission deteriorates
Solution Approach 1:
The patent utilizes the backside of the semiconductor substrate as an additional dimension for signal routing. By forming backside metal lines on the rear surface of the substrate and connecting them to frontside circuits through through-substrate vias, the invention creates a third-dimensional routing space that bypasses the resistivity limitations of scaled frontside metal tracks, thereby maintaining signal transmission efficiency while preserving device density improvements.
2Reliability
If wider metal lines are used for long-distance signal transmission, then signal resistance is reduced, but area consumption increases
Solution Approach 1:
The invention relocates wide metal routing from the planar frontside to the backside of the substrate, utilizing the vertical dimension to separate signal transmission paths from active device areas. This allows wide metal lines to be formed for low-resistance long-distance connections without consuming precious frontside routing area, as the backside provides dedicated space for power and signal distribution networks.
Solution Approach 2:
The patent divides the metal routing function into separate segments: frontside metal layers handle local interconnects between adjacent devices, while backside metal layers handle long-distance power distribution and signal transmission. This segmentation allows each layer to be optimized independently, with backside lines using wider dimensions for low resistance without impacting frontside device density and routing.
3Reliability
If both front and backside metal routing are utilized, then signal transmission performance is improved, but manufacturing complexity increases
Solution Approach 1:
The invention forms the backside metal lines and through-substrate via structures during the later stages of the fabrication process, after the frontside active devices and interconnects are already in place. This preliminary action on the backside allows independent optimization of the routing layer without requiring rework or complex coordination with frontside processing steps, thereby managing manufacturing complexity while achieving enhanced signal transmission performance.
Data Source
AI summary
An integrated circuit includes a driver cell and at least one transmission cell. The driver cell includes a first active area and a second active area, and a first conductive line coupled to the first active area and the second active area on a back side of the integrated circuit. The at least one transmission cell having a second cell height includes a third active area and a fourth active area, a second conductive line coupled to the third active area and the fourth active area on the back side of the integrated circuit, and a conductor coupled to the third active area and the fourth active area. The integrated circuit further includes a third conductive line coupled between the first conductive line and the second conductive line on the back side to transmit a signal between the driver cell and the at least one transmission cell.