Integrated Circuit Built-In Self-Test Circuitry for Noise Reduction

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Solution Overview

Problem

Built-in self-test circuits in integrated circuits have complex configurations, making them susceptible to noise and increasing the cost and time required for testing, which is not efficiently addressed by traditional automatic test equipment.

Innovation Solution

An integrated circuit with a test control circuit, driving circuit, and test detection circuit that generates and compares test command and address signals to detect intermediate test result values without external equipment, reducing complexity and noise susceptibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If built-in self-test circuits are used to reduce testing time and cost, then productivity is improved, but device complexity increases

Engineering Contradiction:
Improvetesting efficiencyVSAvoidcircuit configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the test control circuit, driving circuit, and test detection circuit into an integrated built-in self-test system within the integrated circuit device. This consolidation enables the device to perform self-testing without external equipment, improving productivity while managing complexity through functional integration.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The built-in self-test circuit is designed to perform multiple test functions including generating test command signals, driving test operations, and detecting test results through intermediate values. This multi-functionality allows a single circuit structure to handle various testing requirements, enhancing productivity without proportionally increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If built-in self-test circuits are used to reduce testing time, then productivity is improved, but reliability deteriorates due to noise susceptibility

Engineering Contradiction:
Improvetesting timeVSAvoidtest result accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces intermediate values as mediators in the test detection process. The test detection circuit detects these intermediate values generated during test operations to determine test results. This intermediary approach enables accurate test result detection while maintaining the speed benefits of built-in self-testing, resolving the conflict between productivity and reliability.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If built-in self-test circuits are used to reduce testing cost, then productivity is improved, but device complexity increases requiring more space

Engineering Contradiction:
Improvetesting cost reductionVSAvoidcircuit space
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the built-in self-test circuit into three functional modules: test control circuit, driving circuit, and test detection circuit. This segmentation allows for optimized space utilization by assigning specific functions to each module, reducing overall circuit complexity and space requirements while maintaining the cost benefits of built-in self-testing.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11631469B2Integrated circuit and test method thereof
Publication Date: 2023.04.18 SK HYNIX INC
  • US11631469B2 patent drawing
  • US11631469B2 patent drawing
  • US11631469B2 patent drawing

AI summary

An integrated circuit includes a test control circuit, a driving circuit, and a test detection circuit. The test control circuit generates a test command signal and a test address signal corresponding to a test operation. The driving circuit performs the test operation by utilizing a test internal voltage, which is generated based on the test command signal. The test detection circuit compares the test address signal with target address information to output the test internal voltage.