IC Block Identification Topology With Fewer Connection Pads
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing integrated circuits with stitched patterns require numerous connection pads for function distribution, leading to complex and dense interconnections, especially in large-scale matrix-array circuits like displays and image sensors, and existing solutions either complicate the interconnection or rely on active components for identification.
Innovation Solution
A passive block identification circuit that uses a smaller number of connection pads by routing functions through associated buses with a unique identifier for each block, achieved through a topology of ordered inputs and outputs connected by electrical routing lines, allowing distinction without active components and reducing the number of pads needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If additional connection pads are used to identify blocks, then block identification is achieved, but device complexity increases
Solution Approach 1:
The patent extracts the identification function from the connection pad layer by using a separate identification line layer. This allows blocks to be identified without adding more connection pads, thereby maintaining simple interconnections while achieving precise block identification.
Solution Approach 2:
The patent introduces an intermediary identification line layer between the connection pads and the blocks. These identification lines act as mediators that carry identification signals to distinguish different blocks without requiring additional connection pads, thus resolving the contradiction between identification capability and interconnection complexity.
2Measurement precision
If active components are used for block identification, then block distinction is achieved, but device complexity and power consumption increase
Solution Approach 1:
The patent uses simple conductive identification lines instead of complex active identification circuits. These passive identification lines are structurally simple and do not require power, providing an economical solution for block distinction without increasing device complexity or power consumption.
Solution Approach 2:
The patent changes the identification approach from using active electrical components to using passive conductive structures with different geometrical parameters. By varying the shape, size, or configuration of the identification lines, blocks can be distinguished without requiring active components, thus reducing circuit complexity.
3Adaptability or versatility
If numerous connection pads are used for function distribution, then functionality is maintained, but manufacturing complexity increases
Solution Approach 1:
The patent segments the pad structure into two independent parts: connection pads for electrical connection and identification lines for block identification. This segmentation allows the connection pads to maintain their simple, manufacturable structure while the identification lines provide the necessary functionality for distinguishing blocks, thereby reducing manufacturing complexity.
Solution Approach 2:
The patent adds an identification function in a new dimensional layer by introducing identification lines as a separate layer structure. This dimensional separation allows function distribution to be maintained through existing connection pads while adding identification capability through the new layer, without increasing manufacturing complexity of the original pad structure.
Data Source
AI summary
An integrated circuit comprising N adjacent identical blocks indexed by index j, a current block connected to preceding and following blocks, each comprising identification circuits comprises: N ordered inputs indexed i, connected to N outputs of the preceding block of same index; and N ordered outputs indexed i, connected to N inputs of the following block of same index; each input for i≠N of the current block connected by routing line indexed to output i+1 of the current block; last input N of the current block not connected to output of the current block; and first output 1 of the current block not connected to input of the current block; each block comprising: a connection pad; and N logic gates indexed i, each gate comprising first and second inputs and an output, N buses indexed i comprising a line through N blocks, and connected to output of a logic gate.