IC Blocking Pin for Seamless Test Mode Entry

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Solution Overview

Problem

Complex integrated circuits face challenges in efficient and reliable testing due to limited interface pins and the complexity of transitioning from normal operation to test mode without causing operational side effects or resetting the operating state.

Innovation Solution

An integrated circuit design incorporating a blocking pin that coordinates the operation of shared interface pins to force test signals into quiescent states, allowing a seamless transition from normal mode to test mode without resetting the operating state, using a test control unit to manage access and ensure accurate testing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If shared interface pins are used for both normal operation and test mode, then the number of interface pins required is reduced, but the complexity of coordinating pin operation during mode transition increases

Engineering Contradiction:
Improvenumber of interface pinsVSAvoidcomplexity of pin coordination
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

A blocking pin is introduced as an intermediary control element that mediates between the shared interface pins during mode transition. The blocking pin forces test signals into quiescent states, preventing conflicts between normal operation signals and test mode signals on shared pins, thereby enabling pin sharing without increasing coordination complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The blocking pin is asserted in advance during normal mode operation to pre-force test signals into quiescent states before the actual mode transition occurs. This preliminary action ensures that when test mode is entered, no signal conflicts will arise on shared interface pins, simplifying the transition process

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If test mode is initiated during normal operation, then testing can be performed without resetting operating state, but the risk of operational side effects and undesired effects increases

Engineering Contradiction:
Improvetime to enter test modeVSAvoidrisk of operational side effects
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The blocking pin is used to apply preliminary anti-action by forcing test signals into quiescent states before test mode begins. This prevents test signals from interfering with normal operation during the transition, eliminating undesired operational side effects while allowing rapid mode switching without reset

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The blocking pin acts as a mediator that isolates the test signal paths from normal operation paths during transition. By controlling the blocking pin state, the system can safely switch between modes without causing operational side effects, enabling reliable rapid testing

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If dedicated test pins are reserved for testing purposes, then testing reliability is improved, but the number of available interface pins for normal operation is reduced

Engineering Contradiction:
Improvetesting reliabilityVSAvoidnumber of available interface pins
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

Interface pins are designed with multi-functionality to serve both normal operation and test mode purposes. The blocking pin enables this universality by ensuring that test signals on shared pins do not conflict with normal operation signals, allowing the same physical pins to be reliably used for both functions without dedicated test pins

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS7657805B2Integrated circuit with blocking pin to coordinate entry into test mode
Publication Date: 2010.02.02 ORACLE AMERICAN INC
  • US7657805B2 patent drawing
  • US7657805B2 patent drawing
  • US7657805B2 patent drawing

AI summary

An integrated circuit (IC) including a blocking pin. An IC may include state logic, a test control unit configured to coordinate access by external circuitry to operating state of the state logic during a test mode, and interface pins configured to couple the integrated circuit to the external circuitry. Shared interface pins may provide input signals to the test control unit during the test mode of operation and may perform distinct I/O functions during normal mode operation. A blocking interface pin, when asserted by external circuitry during normal mode operation, may force test signals derived from at least a portion of the shared interface pins by the test control unit into respective quiescent states, such that subsequent to assertion of the blocking pin, the integrated circuit is operable to enter the test mode of operation from the normal mode of operation without resetting operating state of the state logic.