Metal-Passivated IC Bond Interfaces for Fine-Pitch Die Alignment
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing solder and hybrid bonding techniques face challenges in scaling below tens of microns for IC die assembly, with solder techniques being difficult to scale and hybrid bonding requiring precise nanometer-scale alignment, which is time-consuming and expensive.
Innovation Solution
The implementation of self-alignment assisted assembly (SA3) using biphilic surface structures with high wettability contrast, allowing for coarse alignment and passive fine-alignment through liquid droplets, combined with a surface finish on metallization features to inhibit oxidation and ensure low electrical resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If solder assembly techniques are used to join IC die, then the bonding process is simple and robust, but the technique cannot be scaled below tens of microns pitch
Solution Approach 1:
The patent combines dielectric bonding and metallic bonding into a single hybrid bonding process. The dielectric material provides initial adhesion at room temperature, while metallic bond sites are simultaneously prepared for thermal annealing, merging two separate bonding steps into one integrated process that achieves nanometer-scale precision without proportionally increasing complexity
Solution Approach 2:
The patent changes the bonding parameters by using complementary metal oxide semiconductor (CMOS) compatible metallization layers with specific compositions (e.g., copper, aluminum, tungsten) and controlling thermal annealing parameters to achieve controlled interdiffusion. This allows scaling to sub-micron pitches by precisely controlling temperature, time, and material composition parameters
2Manufacturing precision
If hybrid bonding techniques are used to achieve nanometer scale assembly, then scaling below 1 micron pitch is enabled, but nanometer scale alignment is time-consuming and expensive
Solution Approach 1:
The patent implements self-aligned bonding where the dielectric material and metallic bond sites are patterned together as a single integrated structure. The dielectric material surrounding the metallic bond sites provides mechanical support and electrical isolation, causing the components to self-align during bonding without requiring separate alignment steps, thereby reducing alignment time while maintaining nanometer-scale precision
Solution Approach 2:
The patent performs preliminary patterning of both dielectric and metallic features before bonding. The bond sites are pre-configured with appropriate materials and geometries, and the dielectric material is pre-formed to provide structural support. This preliminary preparation eliminates the need for time-consuming real-time alignment adjustments during the bonding process
3Reliability
If metallic bond sites are directly interdiffused during hybrid bonding, then strong electrical connection is achieved, but oxidation at the bond interface increases electrical resistance
Solution Approach 1:
The patent employs inert or reducing atmosphere during thermal annealing to prevent oxidation of metallic bond sites. The bonding process is conducted in a controlled environment with reduced oxygen partial pressure, creating an inert atmosphere that protects the reactive metal surfaces from oxidizing while still allowing controlled interdiffusion to form strong electrical connections
Solution Approach 2:
The patent applies protective measures before bonding to prevent oxidation. The metallic bond sites are prepared with oxidation-resistant surface treatments or coatings prior to assembly, and the bonding process is designed to occur quickly enough that oxidation is minimized. This beforehand protection cushions against the harmful effects of oxidation while maintaining low electrical resistance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables fast and accurate IC die assembly with reduced alignment burdens, improving throughput and reducing the risk of oxidation-related performance issues at the bond interface.
Implementation Method 1
At room temperature, dielectric material adheres sufficiently to establish an initial bond (e.g., due to Van der Waals forces)
Implementation Method 2
self-alignment assisted assembly (SA3) using biphilic surface structures with high wettability contrast, allowing for coarse alignment and passive fine-alignment through liquid droplets
Implementation Method 3
A thermal anneal may then fuse complementary metallic bond sites
Implementation Method 4
a surface finish on metallization features to inhibit oxidation and ensure low electrical resistance
Data Source
Figure 1
Figure 2A~2B
Figure 3A~3B
AI summary
A surface finish on an integrated circuit (IC) die structure or a substrate structure to which an IC die structure is to be bonded has a chemical composition distinct from that of underlying metallization. The surface finish may comprise a Cu-Ni alloy. Optionally, the Cu-Ni alloy may further comprise Mn. Alternatively, the surface finish may comprise a noble metal, such as Pd, Pt, or Ru or may comprise self-assembled monolayer (SAM) molecules comprising Si and C. During the bonding process a biphilic surface on the IC die structure or substrate structure may facilitate liquid droplet-based fine alignment of the IC die structure to a host structure. Prior to bonding, the surface finish may be applied upon a top surface of metallization features and may inhibit oxidation of the top surface exposed to the liquid droplet.