Integrated Circuit Bump Area Reduction via Extended Pad Coverage
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Solution Overview
Problem
Existing integrated circuits face challenges in reducing the pad bump area to meet size limitations, leading to increased die size and costs due to the necessity of enlarging the pad bump area to accommodate bump size requirements.
Innovation Solution
The integrated circuit design extends bumps from the bonding pad area to the conductive line area, allowing the bonding pad to be shortened by separating the pad area from the bump and conductive lines with a passivation layer, thereby reducing the routing area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the bump size is reduced to meet size limitations, then the pad bump area can be reduced, but the bump may not provide sufficient connection strength or meet electrical performance requirements
Solution Approach 1:
The bump structure is extended in the lateral dimension beyond the bonding pad boundary. The bump protrudes from the passivation layer to cover both the bonding pad and adjacent conductive line areas, effectively utilizing horizontal space rather than increasing vertical height or relying solely on pad area enlargement.
Solution Approach 2:
The bump structure merges the coverage of both the bonding pad and the conductive line into a single continuous element. This unified bump structure provides simultaneous electrical connection to the bonding pad and structural support over the conductive line area, reducing the total pad bump area required.
2Reliability
If the bonding pad length is increased to accommodate larger bumps, then the bump connection reliability is improved, but the routing area increases leading to larger die size and higher costs
Solution Approach 1:
Instead of extending the bonding pad in the lateral direction to accommodate larger bumps, the solution extends the bump itself beyond the pad boundary. This reverses the traditional approach by making the bump the dominant feature that defines the coverage area rather than the pad.
Solution Approach 2:
The bump coverage area is segmented into two functional zones: the bonding pad area for electrical connection and the adjacent conductive line area for structural support and routing. This segmentation allows the bump to serve dual purposes without requiring a proportionally larger bonding pad.
Data Source
AI summary
An integrated circuit with a reduced pad bump area and the manufacturing method thereof are disclosed. The integrated circuit includes a semiconductor substrate, an interconnection layer, a passivation layer, and at least a bump. The semiconductor substrate has a semiconductor device thereon. The interconnection layer is disposed on the semiconductor substrate and topped with a top metal layer which at least includes a bonding pad and a conductive line. The passivation layer is disposed on the interconnection layer and has at least an opening to expose the bonding pad. The bump is disposed on the passivation layer to connect the bonding pad through the opening and is extended to a coverage area not directly over the bonding pad.