Abnormal Condition Detection Circuit for IC Card Data Recovery
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Solution Overview
Problem
Conventional smart cards reset upon detecting abnormal conditions without allowing users to learn about the cause or recover data, as they lack the ability to generate interrupts and control reset signals effectively.
Innovation Solution
An integrated circuit card with a CPU that includes an abnormal condition detection circuit capable of generating both reset and interrupt signals, allowing the CPU to perform desired operations and enabling data recovery by controlling the activation/deactivation of detection signals based on an interrupt control signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the smart card directly resets when an abnormal condition is detected, then the CPU and memory are protected from damage, but the user cannot learn about the abnormal condition or recover data
Solution Approach 1:
The abnormal condition detection circuit is segmented into multiple independent detectors (voltage detector, frequency detector, temperature detector, light detector) that can independently detect different types of abnormal conditions. This segmentation allows the system to identify specific abnormal conditions without triggering a complete reset, enabling selective response and data preservation.
Solution Approach 2:
The system dynamically adjusts its response based on the type of abnormal condition detected. Instead of a fixed reset response, the abnormal condition detection circuit can generate either a reset signal or an interrupt signal depending on the detected condition, allowing flexible adaptation between protection mode and data preservation mode.
2Reliability
If the smart card directly resets when an abnormal condition is detected, then security breaches are prevented, but the user cannot perform desired operations or recover data
Solution Approach 1:
The abnormal condition detection circuit acts as an intermediary between the detectors and the CPU, translating detected abnormal conditions into appropriate system responses. It can generate reset signals for severe conditions or interrupt signals for less critical conditions, mediating between security protection and operational continuity.
Solution Approach 2:
The system changes its operational parameters based on the detected abnormal condition. By adjusting the response type (reset vs. interrupt) according to the severity and type of abnormal condition, the system maintains security while allowing operational flexibility for non-critical situations.
3Measurement precision
If the detection signal is always activated, then all abnormal conditions are detected, but the system cannot control when reset occurs
Solution Approach 1:
The detection signal activation is made dynamic through the interrupt control signal. The system can switch between active detection mode and inactive detection mode based on operational requirements, allowing precise control over when abnormal conditions are monitored and when reset responses are triggered.
Data Source
AI summary
An abnormal condition detection circuit, an integrated circuit (IC) card having a central processing unit (CPU), and a method of operating the CPU, allow the CPU to be reset when an abnormal condition is detected in the IC card. The IC card includes the CPU, a non-volatile memory, an abnormal condition detection circuit, and a reset signal generator. The IC card includes detectors that detect a corresponding abnormal condition in the IC card, and an enable signal generation circuit that generates a reset enable signal and an interrupt enable signal in response to an interrupt control signal and a detection signal output from at least one of the detectors. The reset signal generator generates a reset signal in response to the reset enable signal. The CPU is reset in response to the reset signal and interrupted in response to the interrupt enable signal.