Non-Volatile Memory Fragmentation Reduction in IC Cards

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Solution Overview

Problem

Integrated circuit cards, such as UICC and eUICC, face memory fragmentation issues due to the inability to efficiently manage non-volatile memory, leading to reduced allocable block sizes and increased execution times during profile changes and data storage.

Innovation Solution

A method that partitions memory space into segments with allocated and empty regions, selectively widens the largest empty region by moving boundary memory blocks into adjacent empty regions, minimizing fragmentation through iterative block repositioning and skipping large blocks when necessary, thereby reducing the number of memory operations required for defragmentation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory blocks are moved during defragmentation, then memory fragmentation is reduced, but the number of memory operations increases

Engineering Contradiction:
Improvememory fragmentationVSAvoidnumber of memory operations
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the memory defragmentation process into multiple passes, where each pass handles a specific range of memory blocks. This allows the system to process memory in manageable chunks rather than attempting to move all blocks simultaneously, reducing the overall operational burden while still achieving defragmentation goals.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary identification and selection of memory blocks that need to be moved before actual movement occurs. By pre-processing the memory map to identify target blocks and their destinations, the system minimizes unnecessary operations and optimizes the defragmentation process.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If all memory blocks are moved during defragmentation, then fragmentation is reduced, but execution time increases

Engineering Contradiction:
Improvememory fragmentationVSAvoidexecution time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements partial defragmentation by selectively moving only those memory blocks that are necessary to achieve acceptable fragmentation levels. Rather than moving all possible blocks, the system performs partial passes that address the most critical fragmentation issues, reducing execution time while maintaining effective memory utilization.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The patent employs periodic defragmentation passes that can be interrupted and resumed. Multiple passes are performed sequentially, with each pass addressing specific memory regions. This periodic approach allows the system to achieve defragmentation over time without requiring a single lengthy operation, thus reducing perceived execution time.

Inventive Principle:
Principle #19Periodic action

3Ease of operation

If memory space is partitioned into segments, then memory management is improved, but device complexity increases

Engineering Contradiction:
Improvememory managementVSAvoidmemory partitioning structure
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent divides memory into distinct segments or regions that can be independently managed during defragmentation. Each segment can be processed separately, allowing for more granular control over memory operations. This segmentation simplifies the management of large memory spaces by breaking them into manageable units with specific defragmentation strategies.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11995333B2Method for reducing non-volatile memory fragmentation in integrated circuit cards, corresponding card and apparatus
Publication Date: 2024.05.28 STMICROELECTRONICS SRL
  • US11995333B2 patent drawing
  • US11995333B2 patent drawing
  • US11995333B2 patent drawing

AI summary

A method of managing an integrated circuit memory includes identifying a set of allocated regions and a set of empty regions spanning a memory space of an integrated circuit card, selecting the biggest empty region of the set of empty regions, determining that an allocated memory block of an allocated region immediately adjacent to the biggest empty region is larger than the biggest remaining empty region of the memory space, storing the allocated memory block in a temporary list of skipped memory blocks, removing the allocated memory block from the set of allocated memory regions, and swapping the allocated memory block with a remaining empty region to widen the biggest empty region.