IC Chip Bonding to Display Panel via Through-Vias
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Solution Overview
Problem
Existing methods for bonding integrated circuit chips to display panels, particularly in flexible organic light emitting diode displays, face challenges in achieving efficient electrical connections while minimizing damage to the chip during the via-forming process and ensuring a narrow bezel design for improved user experience and display quality.
Innovation Solution
A method involving the formation of vias through the display panel and optical film, with connectors made of conductive material, to electrically connect bonding pads on the chip and panel, allowing for precise alignment and avoiding damage to the chip during the via-forming process, and optionally using laser perforation and protective films for precise placement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If vias are formed through the display panel to connect bonding pads, then electrical connection efficiency is improved, but the integrated circuit chip may be damaged during the via-forming process
Solution Approach 1:
The via formation process is completed before the integrated circuit chip is mounted on the display panel. This preliminary action allows the vias to be formed in the bonding pads without risking damage to the chip, as the chip is not yet present during the potentially harmful laser perforation process.
Solution Approach 2:
The bonding process is divided into distinct stages: first forming vias in the display panel bonding pads, then separately mounting the integrated circuit chip with its bonding pads aligned to overlap with the formed vias. This segmentation separates the chip from the via-forming process while maintaining electrical connection reliability.
2Manufacturing precision
If the integrated circuit chip is bonded to the display panel, then display quality and narrow bezel design are improved, but the bonding process complexity increases
Solution Approach 1:
The bonding pads of the integrated circuit chip and the display panel are merged into a single overlapping region where both bonding pads overlap. The vias are formed to pass through this overlapping region, combining the electrical connection function with the mechanical bonding function in one integrated structure.
Solution Approach 2:
The overlapping region of bonding pads is given special significance as the localized area where vias are formed and where electrical connections are established. This local quality approach concentrates the bonding and electrical connection functions in a specific region, simplifying the overall process while maintaining precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables robust and efficient electrical connections between the chip and panel, ensuring reliable operation and supporting the development of flexible displays with narrow bezels, thereby enhancing user experience and display quality.
Implementation Method 1
forming the plurality of vias are performed by laser perforation
Implementation Method 2
forming the plurality of connectors respectively in the plurality of vias are performed by sputtering a conductive material in the the plurality of vias
Data Source
AI summary
The present application provides a method of bonding an integrated circuit chip to a display panel. The method includes forming a plurality of first bonding pads in a bonding region on a first side of the display panel; forming a plurality of vias extending through the display panel in the bonding region; subsequent to forming the plurality of vias, disposing an integrated circuit chip having a plurality of second bonding pads on a second side of the display panel substantially opposite to the first side, the plurality of second bonding pads being on a side of the integrated circuit chip proximal to the display panel; and electrically connecting the plurality of first bonding pads respectively with the plurality of second bonding pads by forming a plurality of connectors respectively in the plurality of vias.