IC Chip Bonding Pad Relocation to Side Surface
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Solution Overview
Problem
Conventional bonding pads on integrated circuit (IC) chips occupy large space, leading to oversized package structures and are prone to corrosion during the construction of elements like color filters and micro lenses, causing functional and optical issues due to uneven photoresist coating.
Innovation Solution
The bonding pads are positioned at the sides of the IC chip, with conductive layers and connecting portions extending from the die seal ring region to the scribed line, allowing for reduced area occupation and avoiding exposure to developers, thus minimizing corrosion and optical problems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If bonding pads are formed on the front surface within the die seal ring region, then the bonding pads can be easily accessed and connected, but the package structure becomes oversized and occupies larger space
Solution Approach 1:
The bonding pads are relocated from the conventional front surface (2D plane) to the side surface of the substrate, utilizing a different spatial dimension. This dimensional transition allows the bonding pads to be positioned at the periphery of the package structure, reducing the area occupied on the front surface while maintaining accessibility for connection.
2Ease of operation
If bonding pad openings are formed to expose bonding pads, then the bonding pads become accessible for connection, but the bonding pads are corroded by developer causing pittings
Solution Approach 1:
The harmful step of forming bonding pad openings that exposes bonding pads to developer corrosion is completely removed from the manufacturing process. Instead, the bonding pads are positioned at the side surface where they remain protected by the substrate structure, eliminating the source of corrosion while maintaining accessibility for electrical connection.
3Ease of operation
If bonding pad openings are formed, then the bonding pads are exposed for connection, but the photoresist coating becomes uneven affecting optical characteristics
Solution Approach 1:
The step of forming bonding pad openings is extracted and eliminated from the process flow. By positioning bonding pads at the side surface, the patent removes the source of photoresist coating non-uniformity, allowing subsequent optical element fabrication to proceed without defects that would compromise optical characteristics.
Data Source
AI summary
A method of manufacturing an integrated circuit (IC) chip is provided. The method includes the following steps. First, a substrate is provided. The substrate is divided into an internal region and an external region by a die seal ring region. A number of circuit units are then formed in the internal region on the substrate. Thereafter, a dielectric layer is formed over the substrate, interconnects are formed in the dielectric layer within the internal region, and a number of bonding pad structures are formed in the dielectric layer within the external region. Finally, a cutting process is performed along a number of scribed lines on the substrate to form a number of chips. The bonding pad structures are exposed at the sides of each chip.