Integrated Circuit Chip External Pads Flat Face Design
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Solution Overview
Problem
Integrated circuit chips with projecting external contact pads face issues of mechanical weakness and electrochemical degradation due to recessed end faces and material mismatch between internal and external pads, leading to crack risks and corrosion during mounting.
Innovation Solution
The process involves forming multiplicities of tungsten vias through a dielectric surface layer above aluminum internal pads, depositing gold external contact pads on flat front faces, and using an intermediate conducting layer for enhanced bonding, resulting in flat-faced external pads that reduce mechanical stress and electrochemical reactions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If apertures are produced in the surface layer and external contact pads are formed by deposition in these apertures, then external contact pads can be created, but the surface layer is weakened and cracks may appear during mounting
Solution Approach 1:
The patent applies local quality by creating flat front faces at specific locations where external contact pads are formed, while maintaining the overall aperture structure. This localized flat surface approach allows contact pad formation without compromising the surrounding surface layer strength, preventing cracks during mounting operations.
2Reliability
If high pressure is used during mounting to ensure electrical connections, then reliable connections are achieved, but cracks are more likely to appear in the weakened surface layer
Solution Approach 1:
The patent implements beforehand cushioning by pre-forming flat front faces on the surface layer at contact pad locations before mounting. This preparatory structural reinforcement allows the surface layer to withstand mounting pressures without cracking, ensuring both connection reliability and structural integrity during the mounting process.
3Ease of manufacture
If internal pads are made of aluminum and external contact pads are made of gold, then electrical connections are established, but electrochemical reactions occur causing material swelling and degradation
Solution Approach 1:
The patent introduces an intermediate barrier layer between the aluminum internal pads and gold external contact pads. This intermediary layer prevents direct contact between the two metals, blocking electrochemical reactions and galvanic corrosion that would otherwise cause material swelling and connection degradation, thereby ensuring long-term electrical stability.
4Ease of manufacture
If recessed portions are created in external contact pads, then pad formation is achieved, but mounting requires higher pressures increasing crack risk
Solution Approach 1:
The patent inverts the conventional approach by forming flat front faces instead of recessed portions in the external contact pads. This inverted geometry eliminates the need for high mounting pressures to ensure contact, as the flat surfaces provide immediate mechanical and electrical contact with the board, reducing the force required during mounting.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration strengthens the chip structure, reduces crack risks, and prevents electrochemical degradation, allowing for reliable electrical connections under lower pressures without additional reinforcements.
Implementation Method 1
particles made of an electrically conducting material, in such a way that the particles located between the boards and the end or front faces of the external contact pads establish the electrical connections
Implementation Method 2
the projecting external contact pads are produced by a deposition process, whereby an electrically conducting material is grown in the apertures of the surface layer
Data Source
AI summary
An integrated circuit chip has a dielectric surface layer and, below this layer, internal pads. The chip is fabricated by producing multiplicities of vias made of an electrically conducting material which pass through said surface layer and are positioned respectively above the internal pads. Projecting external contact pads are formed on the surface layer and connected respectively to the multiplicities of vias.


