IC Chip Support Terminal Memory Registration for Multiple Applications

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Solution Overview

Problem

Existing IC-chip-based applications face reliability issues due to communication failures during memory area registration, leading to incomplete installation of multiple applications and insufficient memory capacity, preventing cooperation between applications.

Innovation Solution

A method for IC chip management systems that allows simultaneous or sequential registration of memory areas for multiple IC-chip-based applications, ensuring early completion and reliability through continuous communication maintenance and parallel processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory area registration for multiple IC-chip-based applications is executed sequentially as a series of processes, then the registration process can be completed step by step, but processing may be stopped at some midpoint due to communication failure, leading to insufficient memory capacity and inability to register subsequent applications

Engineering Contradiction:
Improvereliability of memory area registrationVSAvoidprocessing efficiency of application installation
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by predicting the total memory area requirement for multiple IC-chip-based applications before the registration process begins. The system calculates the sum of memory areas needed for all applications to be installed, then verifies whether the IC chip has sufficient unused memory capacity in advance. This preliminary verification prevents processing stoppage due to insufficient memory capacity, thereby improving the reliability of memory area registration while maintaining efficient parallel processing capability.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If memory area registration for multiple IC-chip-based applications is executed in parallel, then processing efficiency is improved, but the system complexity increases and communication management becomes more difficult

Engineering Contradiction:
Improveprocessing efficiency of application installationVSAvoidcomplexity of registration process management
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing prediction processing before parallel memory area registration. The system predicts the total memory area required for all applications to be installed in parallel, verifies sufficient unused memory capacity exists in the IC chip, and only then proceeds with parallel registration. This preliminary verification simplifies communication management by ensuring resource availability upfront, reducing the need for complex error handling and retry logic during parallel processing.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If the system verifies sufficient memory capacity before each application installation, then reliability is improved, but additional processing time is required

Engineering Contradiction:
Improvereliability of application installationVSAvoidtime for memory capacity verification
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing memory capacity prediction and verification once before parallel memory area registration begins, rather than verifying capacity before each individual application installation. The system predicts the total memory area requirement for all applications, verifies sufficient unused capacity exists in the IC chip upfront, and then proceeds with parallel registration without repeated verification steps. This approach maintains high reliability while minimizing time loss by consolidating the verification process.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3534254B1IC chip support type terminal, IC chip setting method, and program
Publication Date: 2025.09.17 RAKUTEN GROUP INC
  • EP3534254B1 patent drawingFigure 1
  • EP3534254B1 patent drawingFigure 2
  • EP3534254B1 patent drawingFigure 3

AI summary

To enhance reliability to enable use of all of a plurality of IC-chip-based applications, transmission means (101) of an IC chip support terminal (10) transmits, to an IC chip management server (30), a registration request for each of a plurality of memory areas respectively corresponding to a plurality of IC-chip-based applications for using an IC chip (16) which is enabled to perform wireless communication. Reception means (102) receives registration instructions for the respective memory areas, each of which is transmitted by the IC chip management server (30) in response to the registration request. Registration means (104) executes processes for registering the respective memory areas in the IC chip (16) successively or in parallel based on the registration instructions. Initial setting means (106) performs an initial setting on each of the registered memory areas when all the plurality of memory areas have been registered in the IC chip (16).