IC Chip Package with Device Hole and Interposer Terminal Spacing

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Solution Overview

Problem

The existing IC chip mounting packages face issues with inner lead peeling and tape undulation due to deformation during manufacturing steps, particularly when using a tape carrier as the circuit board, which increases costs and testing complexities.

Innovation Solution

The package design includes an IC chip connected to a package base member via an interposer, with the leading ends of the connection terminals positioned at least 10 μm away from the device hole periphery to prevent peeling and no more than 150 μm to minimize thermal expansion-induced undulation, and a bonding tool dimensioned to align with the bump electrodes for reduced heating and peeling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the leading ends of connection terminals are positioned close to the device hole periphery to reduce package size, then the area is reduced, but inner lead peeling occurs due to deformation during manufacturing

Engineering Contradiction:
Improvepackage base member areaVSAvoidinner lead connection reliability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent positions the leading ends of connection terminals at a predetermined distance (10-150 μm) away from the device hole periphery before manufacturing processes occur. This preliminary positioning prevents the terminals from being in the deformation zone during punching and bonding operations, thereby avoiding peeling while maintaining compact package dimensions.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the leading ends of connection terminals are positioned far from the device hole periphery to prevent peeling, then reliability is improved, but the package size increases

Engineering Contradiction:
Improveinner lead connection reliabilityVSAvoidpackage base member area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent optimizes the distance parameter between the leading ends of connection terminals and the device hole periphery to a specific range (10-150 μm). This parameter optimization balances the conflicting requirements of preventing peeling (needing sufficient distance) and minimizing package size (needing small distance), achieving both reliability and compactness.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If a punching process is used to open the device hole to reduce manufacturing complexity, then ease of manufacture is improved, but deformation occurs causing inner lead peeling

Engineering Contradiction:
Improvedevice hole formation easeVSAvoidinner lead connection reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent extracts the connection terminals from the deformation zone caused by punching by positioning them at a distance from the device hole periphery. This separation allows the punching process to proceed without affecting the terminals, maintaining both manufacturing ease and connection reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

4Strength

If heat and pressure are applied for bonding to achieve strong connection, then connection strength is improved, but thermal expansion causes tape undulation

Engineering Contradiction:
Improvebonding strengthVSAvoidtape flatness
Core Design Contradiction:
StrengthVSShape

Solution Approach 1:

The patent positions the connection terminals away from the device hole periphery before bonding occurs. This preliminary positioning ensures that even when heat and pressure cause thermal expansion and potential tape undulation near the device hole, the connection terminals remain unaffected and maintain proper alignment and bonding quality.

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively suppresses inner lead peeling and tape undulation, reducing manufacturing costs and improving the reliability of the IC chip mounting package by maintaining terminal accuracy and stability during the bonding process.

Implementation Method 1

an interposer which includes second connecting terminals, on a side of the package base member, which are arranged so as to be connected to the first connecting terminals, respectively

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

the application of heat and pressure so that the tape carrier is brought into conduction with the IC chip

Methodology Applied
Scientific EffectThermal bonding: Heating

Data Source

PatentUS8129825B2IC chip package employing substrate with a device hole
Publication Date: 2012.03.06 SHENZHEN TOREY MICROELECTRONIC TECH CO LTD
  • US8129825B2 patent drawing
  • US8129825B2 patent drawing
  • US8129825B2 patent drawing

AI summary

In one embodiment of the present invention, an IC chip mounting package includes a film base member and an IC chip connected via an interposer. Connecting terminals on the film base member side of the interposer are provided so as to have a pitch larger than that of connecting terminals of the IC. A device hole is opened to the film base member, and the IC chip is provided in the device hole. A distance between an inner lead leading end and a periphery of the device hole is set as not less than 10 μm.