IC Chip Package With Isolated Vias and Cover
Solution Overview
Problem
Existing IC chip packages face challenges in maintaining reliability due to inconsistent adhesive application, leading to potential moisture ingress, oxidation, and contamination of vias, which can result in faulty electrical connections and package failure.
Innovation Solution
The IC chip package incorporates a substrate with isolated vias filled with conductive material, topped by solder pads, and protected by a cover to prevent adhesive ingress and exposure to ambient air, ensuring reliable electrical connections and protecting the conductive material from oxidation and contamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If adhesive means is applied to secure the cover to the substrate, then the cover adheres to the substrate, but the adhesive may overflow into the through holes causing insulating coatings that prevent proper electrical connection
Solution Approach 1:
The through holes are segmented into two functional zones: an upper portion that remains open for electrical connection, and a lower portion that is filled with conductive material to prevent adhesive ingress. This segmentation allows the adhesive to secure the cover effectively without overflowing into the electrical connection paths.
Solution Approach 2:
The conductive material filling the lower portion of the through holes acts as an intermediary barrier that prevents the adhesive from reaching the electrical connection interface. This intermediary structure maintains both the bonding strength of the adhesive and the electrical conductivity of the through holes.
2Strength
If adhesive means is applied to secure the cover to the substrate, then the cover adheres to the substrate, but insufficient adhesive causes gaps that allow moisture penetration affecting chip functioning
Solution Approach 1:
The through holes are divided into an upper open portion for electrical connection and a lower filled portion that acts as a moisture barrier. This segmentation ensures that even with minimal adhesive application, the lower filled portion prevents moisture from reaching the chip interior.
Solution Approach 2:
The potential harm of adhesive overflow is converted into a benefit by using conductive material filling in the lower through hole portions. This filling material, which would otherwise be wasted material, creates a moisture barrier that protects the chip while allowing minimal adhesive to be used for secure bonding.
3Reliability
If through holes are exposed to ambient air, then electrical connection is established, but the through holes are affected by oxidation or contamination leading to faulty electrical connection
Solution Approach 1:
The through holes are segmented such that only the upper portions are exposed to ambient air for electrical connection, while the lower portions are filled with conductive material and protected from oxidation and contamination. This selective exposure maintains electrical connectivity while protecting the bulk of the through hole structure.
4Strength
If excessive adhesive means is used, then the cover adheres securely to the substrate, but the adhesive overflows down along the through holes forming insulating coatings
Solution Approach 1:
The through holes are divided into upper and lower portions, with the lower portions filled with conductive material. This segmentation creates a physical barrier that prevents adhesive overflow regardless of the amount of adhesive applied, eliminating the need for precise adhesive application control.
Solution Approach 2:
The lower portions of the through holes are partially filled with conductive material to create a barrier against adhesive overflow. This partial filling is sufficient to prevent adhesive ingress while allowing excessive adhesive to be applied without causing electrical connection failures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the reliability and longevity of the IC chip package by preventing adhesive overflow and protecting the vias from oxidation and contamination, thereby ensuring consistent and durable electrical connections.
Implementation Method 1
The vias are defined in the substrate, and having conductive material defined therein in order to electrically connect the top solder pads with the bottom solder pads
Implementation Method 2
protected by a cover to prevent adhesive ingress and exposure to ambient air, ensuring reliable electrical connections and protecting the conductive material from oxidation and contamination
Data Source
AI summary
An IC chip package includes a substrate (2), a chip (5), a plurality of bonding wires (52), and a cover (6). The substrate has a top surface, a receiving chamber (23) having an opening at the top surface, a plurality of solder pads (3) arranged around the top surface and respectively corresponding to the solder pads arranged at a bottom surface opposite to the top surface, and a plurality of vias (4) having conductive material electrically connecting the top solder pads with the bottom solder pads defined therein. The chip is mounted in the receiving chamber, and has a plurality of chip solder pads (51) arranged around a top surface thereof. The bonding wires respectively electrically connect the top solder pads of the substrate with the chip solder pads. The cover is fastened to the top surface of the substrate, and covers the opening.