IC Chip Pad Arrangement for USB Type-C Signal Integrity

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Solution Overview

Problem

The USB Type-C interface's flip-able feature requires two pairs of TX and RX signals for signal transmission, but existing designs often arrange these pads in the same row, leading to crosstalk issues and increased chip size and costs due to the need for multiple ports, which complicates signal quality and increases costs.

Innovation Solution

The arrangement of TX and RX differential pair pads in two non-adjacent rows on both the integrated circuit chip and package substrate reduces crosstalk by placing transmission and reception pads of the same group in different rows, allowing for a more compact design compatible with USB 4 specifications.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If TX and RX differential pair pads are arranged in the same row, then the chip size is reduced, but crosstalk between differential pairs increases

Engineering Contradiction:
Improvechip sizeVSAvoidcrosstalk
Core Design Contradiction:
Area of moving objectVSObject-generated harmful factors

Solution Approach 1:

The patent transitions from arranging all pads in a single row (one-dimensional arrangement) to distributing pads across multiple rows (two-dimensional arrangement). Specifically, TX differential pair pads are placed in one row while RX differential pair pads are placed in another row, thereby reducing spatial proximity and crosstalk while maintaining compact chip size.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Adaptability or versatility

If two pairs of TX and RX signals are included for flip-able feature, then the adaptability is improved, but the device complexity increases

Engineering Contradiction:
Improveflip-able feature supportVSAvoidsignal pair arrangement
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent employs asymmetric arrangement where TX differential pair pads and RX differential pair pads are positioned differently in space (different rows). This asymmetric layout reduces the complexity of signal routing and minimizes interference between transmission and reception pairs, thereby supporting the flip-able feature without proportionally increasing device complexity.

Inventive Principle:
Principle #4Asymmetry

3Manufacturing precision

If TX and RX pads are placed adjacent to each other, then the manufacturing precision requirement is reduced, but signal quality deteriorates due to crosstalk

Engineering Contradiction:
Improvepad placement toleranceVSAvoidsignal quality
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent segments the pad arrangement into distinct groups: TX differential pairs in one row and RX differential pairs in another row. This segmentation physically separates transmission and reception signals, reducing crosstalk and improving signal quality. The segmentation approach maintains reasonable manufacturing precision requirements while enhancing signal integrity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11735502B2Integrated circuit chip, package substrate and electronic assembly
Publication Date: 2023.08.22 VIA LABS INC
  • US11735502B2 patent drawing
  • US11735502B2 patent drawing
  • US11735502B2 patent drawing

AI summary

An integrated circuit chip has an active surface and a chip pad arrangement on the active surface. The chip pad arrangement includes four pairs of chip pads arranged in two rows along a side edge of the active surface. Two pairs of chip pads are a first transmission differential pair chip pad and a first reception differential pair chip pad respectively. Positions of the two pairs of chip pads are not adjacent to each other and are in different rows. The other two pairs of chip pads are a second transmission differential chip pad and a second reception differential chip pad respectively. Positions of the other two pairs of chip pads are not adjacent to each other and are in different rows. In addition, a package substrate corresponding to the integrated circuit chip and an electronic assembly including the package substrate and the integrated circuit chip are also provided.