IC Chip Safe Mode Control via Dual Detector Feedback
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Solution Overview
Problem
Integrated circuit (IC) chips face issues with fast transient spikes in supply voltage causing undesirable output levels and incorrect status indications due to power disturbances, leading to potential damage and incorrect status reporting.
Innovation Solution
A controller in the IC chip uses both a power/peak detector and a status detector to determine when to enter and exit safe mode based on the input supply voltage and circuit voltage or current levels, ensuring accurate status reporting and preventing damage by turning off the output when thresholds are exceeded.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the IC chip enters safe mode based solely on power detector output, then the response speed to voltage spikes is improved, but the measurement precision of status indication deteriorates
Solution Approach 1:
The patent implements a feedback mechanism where the controller continuously monitors both the power detector output and status detector output, and adjusts the safe mode entry/exit decisions based on the combined feedback from both detectors. This ensures accurate status reporting while maintaining fast response to actual threats.
Solution Approach 2:
The controller acts as an intermediary between the power detector and status detector, reconciling their potentially conflicting signals. It uses logical evaluation of both detector outputs to make informed decisions about safe mode entry and exit, preventing premature or incorrect safe mode transitions.
2Measurement precision
If the IC chip uses both power detector and status detector for safe mode determination, then the measurement precision of status indication is improved, but the device complexity increases
Solution Approach 1:
The patent merges the functions of the power detector and status detector into a unified safe mode control system. The controller integrates both detector outputs using logical evaluation, combining their capabilities to achieve accurate status indication while managing complexity through functional integration.
Solution Approach 2:
The controller is designed with multi-functionality, serving as both the decision-making unit for safe mode entry/exit and the coordinator for both detectors. This universal component reduces overall system complexity by eliminating the need for separate control logic for each detector.
3Reliability
If the IC chip enters safe mode frequently to ensure safety, then the reliability is improved, but the productivity deteriorates
Solution Approach 1:
The patent implements dynamic safe mode control where the system adapts its safe mode entry and exit behavior based on real-time conditions from both detectors. This dynamic approach allows the system to maintain high reliability by entering safe mode when necessary while minimizing unnecessary safe mode transitions that would reduce productivity.
Solution Approach 2:
The status detector provides preliminary information about circuit conditions before safe mode entry is triggered. This preliminary detection allows the system to prepare for safe mode transitions more intelligently, reducing unnecessary transitions and maintaining operational continuity while still ensuring safety when required.
Data Source
AI summary
The disclosure describes examples of integrate circuit (IC) chips. An IC chip includes a first detector configured to generate information indicative of whether an input supply voltage or power is greater than or equal to a first threshold, a second detector configured to receive a circuit voltage or current level and generate information used to indicate a status of the IC chip based on the received circuit voltage or current level, and a controller configured to cause the IC chip to enter a safe mode in response to both the first detector indicating that the input supply voltage or power is greater than the first threshold and the circuit voltage or current level being greater than a second threshold.


