IC Chip Voltage Bin Reassignment via Leakage Power Screening
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Solution Overview
Problem
Selective voltage binning in integrated circuit (IC) chip manufacturing leads to reduced yield due to high sensitivity to process parameter variations during testing at low voltages, causing performance failures.
Innovation Solution
Implementing pre-test power-optimized bin reassignment by comparing leakage power measurements of IC chips to bin-specific leakage power screen values, allowing chips to be reassigned to slower voltage bins for testing at higher minimum voltages, thereby minimizing the risk of violating maximum total power constraints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If IC chips are tested at bin-specific minimum test voltages (low voltages), then power consumption is minimized, but yield is reduced due to high sensitivity to process parameter variations causing performance failures
Solution Approach 1:
The patent performs preliminary bin reassignment based on leakage power measurements before the actual testing process. By pre-assigned chips to appropriate voltage bins based on their leakage characteristics, the system prepares the testing configuration in advance, allowing chips to be tested at higher minimum test voltages that correspond to their assigned bins, thereby improving yield while controlling power consumption.
2Speed
If IC chips are assigned to faster voltage bins, then operating speed is improved, but power consumption increases and may violate maximum total power constraints
Solution Approach 1:
The patent changes the voltage parameter assignment based on leakage power measurements. Instead of assigning all chips to the fastest voltage bin, the system adjusts the voltage bin assignment based on each chip's measured leakage power characteristics, optimizing the balance between operating speed and power consumption for each individual chip.
Solution Approach 2:
The patent applies different voltage bin assignments to different chips based on their individual leakage power characteristics. Rather than a uniform assignment, each chip receives a customized voltage bin assignment that matches its local characteristics, allowing faster chips to operate at higher voltages while slower or more power-sensitive chips operate at lower voltages, thus optimizing both speed and power consumption locally.
3Reliability
If IC chips are tested at higher minimum voltages, then yield is improved by reducing sensitivity to process parameter variations, but power consumption increases
Solution Approach 1:
The system performs preliminary leakage power measurements and bin reassignments before testing. By pre-characterizing chips and assigning them to appropriate voltage bins based on leakage power, the system enables testing at higher minimum voltages for chips that can tolerate them, thereby improving yield through reduced sensitivity to process variations while managing power consumption through informed voltage selection.
Data Source
AI summary
Disclosed is a method wherein selective voltage binning and leakage power screening of integrated circuit (IC) chips are performed. Additionally, pre-test power-optimized bin reassignments are made on a chip-by-chip basis. Specifically, a leakage power measurement of an IC chip selected from a voltage bin can is compared to a bin-specific leakage power screen value of the next slower voltage bin. If the leakage power measurement is higher, the IC chip will be left in the voltage bin to which it is currently assigned. If the leakage power measurement is lower, the IC chip will be reassigned to that next slower voltage bin. These processes can be iteratively repeated until no slower voltage bins are available or the IC chip cannot be reassigned. IC chips can subsequently be tested according to testing parameters, including the minimum test voltages, associated with the voltage bins to which they are finally assigned.